Engineering Commons^™

Energy-Efficient Stdp-Based Learning Circuits With Memristor Synapses, Xinyu Wu, Vishal Saxena, Kristy A. Campbell

Electrical and Computer Engineering Faculty Publications and Presentations

It is now accepted that the traditional von Neumann architecture, with processor and memory separation, is ill suited to process parallel data streams which a mammalian brain can efficiently handle. Moreover, researchers now envision computing architectures which enable cognitive processing of massive amounts of data by identifying spatio-temporal relationships in real-time and solving complex pattern recognition problems. Memristor cross-point arrays, integrated with standard CMOS technology, are expected to result in massively parallel and low-power Neuromorphic computing architectures. Recently, significant progress has been made in spiking neural networks (SNN) which emulate data processing in the cortical brain. These architectures comprise of …