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Ternary And Quaternary Logic To Binary Bit Conversion Cmos Integrated Circuit Design Using Multiple Input Floating Gate Mosfets, Harish N. Venkata
Ternary And Quaternary Logic To Binary Bit Conversion Cmos Integrated Circuit Design Using Multiple Input Floating Gate Mosfets, Harish N. Venkata
LSU Master's Theses
Multiple-input floating gate MOSFETs and floating gate potential diagrams have been used for conversion of ternary-valued input and quaternary-valued input into corresponding binary-valued output in CMOS integrated circuit design environment. The method is demonstrated through the design of a circuit for conversion of ternary inputs 00 to -1-1 (decimal 0 to -4) and 00 to 11 (decimal 0 to +4) into the corresponding binary bits and for conversion of quaternary inputs (decimal 0 to 3) into the corresponding binary bits (binary 00 to 11) in a standard 1.5 mm digital CMOS technology. The physical design of the circuits is simulated …