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Electrical and Computer Engineering

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Boise State University

Electrical and Computer Engineering Faculty Publications and Presentations

2017

Spike timing-dependent plasticity (STDP)

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Full-Text Articles in Engineering

Spatio-Temporal Pattern Recognition In Neural Circuits With Memory-Transistor-Driven Memristive Synapses, Kurtis D. Cantley, Robert C. Ivans, Anand Subramaniam, Eric M. Vogel Jan 2017

Spatio-Temporal Pattern Recognition In Neural Circuits With Memory-Transistor-Driven Memristive Synapses, Kurtis D. Cantley, Robert C. Ivans, Anand Subramaniam, Eric M. Vogel

Electrical and Computer Engineering Faculty Publications and Presentations

Spiking neural circuits have been designed in which the memristive synapses exhibit spike timing-dependent plasticity (STDP). STDP is a learning mechanism where synaptic weight (the strength of the connection between two neurons) depends on the timing of pre-and post-synaptic action potentials. A known capability of networks with STDP is detection of simultaneously recurring patterns within the population of afferent neurons. This work uses SPICE (simulation program with integrated circuit emphasis) to demonstrate the spatio-temporal pattern recognition (STPR) effect in networks with 25 afferent neurons. The neuron circuits are the leaky integrate-and-fire (I&F) type and implemented using extensively validated ambipolar nano-crystalline …


A Cmos Synapse Design Implementing Tunable Asymmetric Spike Timing-Dependent Plasticity, Robert C. Ivans, Kurtis D. Cantley, Justin L. Shumaker Jan 2017

A Cmos Synapse Design Implementing Tunable Asymmetric Spike Timing-Dependent Plasticity, Robert C. Ivans, Kurtis D. Cantley, Justin L. Shumaker

Electrical and Computer Engineering Faculty Publications and Presentations

A CMOS synapse design is presented which can perform tunable asymmetric spike timing-dependent learning in asynchronous spiking neural networks. The overall design consists of three primary subcircuit blocks, and the operation of each is described. Pair-based Spike Timing-Dependent Plasticity (STDP) of the entire synapse is then demonstrated through simulation using the Cadence Virtuoso platform. Tuning of the STDP curve learning window and rate of synaptic weight change is possible using various control parameters. With appropriate settings, it is shown the resulting learning rule closely matches that observed in biological systems.