Engineering Commons^™

3d Fpga Cell Matrix By Self-Assembly, Jeffrey Udall

Undergraduate Research & Mentoring Program

Physical size limitations in miniaturizing two-dimensional (2D) transistors are becoming more difficult to overcome. In order to continue increasing the processing power of electronic circuits, new design paradigms are needed. Three-dimensional (3D) architectures provide a solution to this issue and are currently being implemented via wafer stacking. However, more significant gains in terms of packing and speed can be achieved by CMOS components with truly integrated 3D cellular architectures. One of these is the Cell Matrix, a self-configurable defect- and fault-tolerant architecture, which is ideally suited for ultra large-scale integration. For this project, we worked to expand the Cell Matrix …