Engineering Commons^™

Probabilistic Verification For Modular Network-On-Chip Systems, Jonah W. Boe

All Graduate Theses and Dissertations, Spring 1920 to Summer 2023

Modeling physical systems with formal analysis tools can help in the design of more fault-proof systems, by helping to determine if unpredictable or unwanted behavior may occur. Probabilistic verification further advances such processes, by providing quantitative information about the system. More complex systems can especially benefit from formal modeling and verification, as testing the physical system in every possible condition manually, can be extremely complex, and often impossible.

There is a growing interest in the application of Network-on-Chip (NoC) systems. NoCs can help simplify communication between the subsystems of many technologies, including the ever more complex multicore processors being produced. …

Design Of Environment Aware Planning Heuristics For Complex Navigation Objectives, Carter D. Bailey

All Graduate Theses and Dissertations, Spring 1920 to Summer 2023

A heuristic is the simplified approximations that helps guide a planner in deducing the best way to move forward. Heuristics are valued in many modern AI algorithms and decision-making architectures due to their ability to drastically reduce computation time. Particularly in robotics, path planning heuristics are widely leveraged to aid in navigation and exploration. As the robotic platform explores and navigates, information about the world can and should be used to augment and update the heuristic to guide solutions. Complex heuristics that can account for environmental factors, robot capabilities, and desired actions provide optimal results with little wasted exploration, but …

Decoding Ldpc Codes With Probabilistic Local Maximum Likelihood Bit Flipping, Rejoy Roy Mathews

All Graduate Theses and Dissertations, Spring 1920 to Summer 2023

Communication channels are inherently noisy making error correction coding a major topic of research for modern communication systems. Error correction coding is the addition of redundancy to information transmitted over communication channels to enable detection and recovery of erroneous information. Low-density parity-check (LDPC) codes are a class of error correcting codes that have been effective in maintaining reliability of information transmitted over communication channels. Multiple algorithms have been developed to benefit from the LDPC coding scheme to improve recovery of erroneous information. This work develops a matrix construction that stores the information error probability statistics for a communication channel. This …

Stamina: Stochastic Approximate Model-Checker For Infinite-State Analysis, Thakur Neupane

All Graduate Theses and Dissertations, Spring 1920 to Summer 2023

Reliable operation of every day use computing system, from simple coffee machines to complex flight controller system in an aircraft, is necessary to save time, money, and in some cases lives. System testing can check for the presence of unwanted execution but cannot guarantee the absence of such. Probabilistic model checking techniques have demonstrated significant potential in verifying performance and reliability of various systems whose execution are defined with likelihood. However, its inability to scale limits its applicability in practice.

This thesis presents a new model checker, STAMINA, with efficient and scalable model truncation for probabilistic verification. STAMINA uses a …

Predicting Critical Warps In Near-Threshold Gpgpu Applications Using A Dynamic Choke Point Analysis, Sourav Sanyal

All Graduate Theses and Dissertations, Spring 1920 to Summer 2023

General purpose graphics processing units (GP-GPU), owing to their enormous thread-level parallelism, can significantly improve the power consumption at the near-threshold (NTC) operating region, while offering close to a super-threshold performance. However, process variation (PV) can drastically reduce the GPU performance at NTC. In this work, choke points—a unique device-level characteristic of PV at NTC—that can exacerbate the warp criticality problem in GPUs have been explored. It is shown that the modern warp schedulers cannot tackle the choke point induced critical warps in an NTC GPU. Additionally, Choke Point Aware Warp Speculator, a circuit-architectural solution is proposed to dynamically …

Tackling Choke Point Induced Performance Bottlenecks In A Near-Threshold Gpgpu, Tahmoures Shabanian

All Graduate Theses and Dissertations, Spring 1920 to Summer 2023

Over the last decade, General Purpose Graphics Processing Units (GPGPUs) have garnered a substantial attention in the research community due to their extensive thread-level parallelism. GPGPUs provide a remarkable performance improvement over Central Processing Units (CPUs), for highly parallel applications. However, GPGPUs typically achieve this extensive thread-level parallelism at the cost of a large power consumption. Consequently, Near-Threshold Computing (NTC) provides a promising opportunity for designing energy-efficient GPGPUs (NTC-GPUs). However, NTC-GPUs suffer from a crucial Process Variation (PV)-inflicted performance bottleneck, which is called Choke Point. Choke Point is defined as one or small group of gates which is affected by …

Split Latency Allocator: Process Variation-Aware Register Access Latency Boost In A Near-Threshold Graphics Processing Unit, Asmita Pal

All Graduate Theses and Dissertations, Spring 1920 to Summer 2023

Over the last decade, Graphics Processing Units (GPUs) have been used extensively in gaming consoles, mobile phones, workstations and data centers, as they have exhibited immense performance improvement over CPUs, in graphics intensive applications. Due to their highly parallel architecture, general purpose GPUs (GPGPUs) have gained the foreground in applications where large data blocks can be processed in parallel. However, the performance improvement is constrained by a large power consumption. Likewise, Near Threshold Computing (NTC) has emerged as an energy-efficient design paradigm. Hence, operating GPUs at NTC seems like a plausible solution to counteract the high energy consumption. This work …

Effects Of Intentional Electromagnetic Interference On Analog To Digital Converter Measurements Of Sensor Outputs And General Purpose Input Output Pins, David A. Ware

All Graduate Theses and Dissertations, Spring 1920 to Summer 2023

As technology becomes more prevalent, its application to safety and security in critical systems continues to increase. This leads to an increased dependence on sensors to provide an accurate view of the environment surrounding an application. These sensors can also be exploited by a malicious individual to attack a system and compromise its safety or security. These attacks change the reported value of a sensor so that it doesn't reflect the real situation. The systems in a car can be used as an example of this. Cars can have numerous sensors that measure a variety of things, including the car's …

Visualization Of Three-Dimensional Models From Multiple Texel Images Created From Fused Ladar/Digital Imagery, Cody C. Killpack

All Graduate Theses and Dissertations, Spring 1920 to Summer 2023

The ability to create three-dimensional (3D) images offers a wide variety of solutions to meet ever increasing consumer demands. As popularity for 3D cinema and television continues to grow, 3D images will remain an important area of research and development. While there are a variety of ways to create a 3D model, textel images are quickly become the preferred solution that has been captured with a texel camera. The combination of multiple texel images taken around a scene can be used to form a texel model. Offering both visual and dimensional accuracy, texel models are becoming invaluable tools for disaster …

Ground Vehicle Platooning Control And Sensing In An Adversarial Environment, Samuel A. Mitchell

All Graduate Theses and Dissertations, Spring 1920 to Summer 2023

In the past few years, automated cars have ceased to be part of science fiction, and have instead become a technology that has been implemented, with partially automated systems currently available to customers.

One benefit of automated vehicle technology is the consistent driving patterns due to automation, instead of the inconsistency of distractible humans. Passengers of automated vehicles will be exposed to much less danger than the passengers of human-driven vehicles.

These statements will only be true as automated vehicle systems are scrutinized by experts to find flaws in the system. Security enthusiasts have already hijacked control of an automated …

Synergistic Timing Speculation For Multi-Threaded Programs, Atif Yasin

All Graduate Theses and Dissertations, Spring 1920 to Summer 2023

Timing speculation is a promising approach to increase the processor performance and energy efficiency. Under timing speculation, an integrated circuit is allowed to operate at a speed faster than the rated speed specified by its vendor. However, doing so might result in an incorrect execution. Consequently, as long as the processor is equipped with an error detection and recovery mechanism, its performance can be increased and/or energy consumption reduced beyond that achievable by any other conventional operation.

While many past works have dealt with timing speculation within a single core, in this work, a new direction is being uncovered by …

Runtime Detection Of A Bandwidth Denial Attack From A Rogue Network-On-Chip, Rajesh Jayashankarashridevi

All Graduate Theses and Dissertations, Spring 1920 to Summer 2023

Chips with high computational power are the crux of today’s pervasive complex digital systems. Microprocessor circuits are evolving towards many core designs with the integration of hundreds of processing cores, memory elements and other devices on a single chip to sustain high performance computing while maintaining low design costs. Two decisive paradigm shifts in the semiconductor industry have made this evolution possible: (a) architectural and (b) organizational.

At the heart of the architectural innovation is a scalable high speed data communication structure, the network-on-chip (NoC). NoC is an interconnect network for the glueless integration of on-chip components in the …

Evaluation Of Tracking Regimes For, And Security Of, Pli Systems, Shayan Taheri

All Graduate Theses and Dissertations, Spring 1920 to Summer 2023

In recent years, the researchers and engineers have realized that the trustiness of computer and networking devices and hardware can no longer be examined properly using the existing identification and security checking methods that operate based on the digital representation of data. As an example, since the digital identifiers can be copied, it is difficult to tie a digital identity to a device for sure. Also, the new or present created cyber attacks can manipulate the used digital data in a network easily. Due to these issues, the trend in development of new identification and security checking methods has moved …

An Online Wear State Monitoring Methodology For Off-The-Shelf Embedded Processors, Srinath Arunachalam

All Graduate Theses and Dissertations, Spring 1920 to Summer 2023

Every year transistors are becoming smaller and smaller. The continued trend of transistors becoming smaller has led to double amount of transistors being placed in the same area of space from its previous generation. This has led to an exponential increase in the amount of power per unit volume on-chip, which has resulted in increasing temperature. In turn, the increase in temperature directly leads to the increase in the rate of wear of a processor. Negative-bias temperature instability (NBTI) is one of the most dominant integrated circuit (IC) failure mechanisms [5, 13] that strongly depends on temperature. NBTI manifests in …

Real-Time Scheduling Algorithm Design On Stochastic Processors, Anushka Pakrashi

All Graduate Theses and Dissertations, Spring 1920 to Summer 2023

Recent studies have shown that significant power savings are possible with the use of in-exact processors, which may contain a small percentage of errors in computation. However, use of such processors in time-sensitive systems is challenging as these processors significantly hamper the system performance. In this thesis, a design framework is developed for real-time applications running on stochastic processors. To identify hardware error pat- terns, two methods are proposed to predict the occurrence of hardware errors. In addition, an algorithm is designed that uses knowledge of the hardware error patterns to judiciously schedule real-time jobs in order to maximize real-time …

Physical Layer Detection Of Hardware Keyloggers, Saptarshi Mallick

All Graduate Theses and Dissertations, Spring 1920 to Summer 2023

This work addresses the problem of detecting devices which are stealthily attached to the computer for logging keystrokes from keyboards. These devices are known as hardware keyloggers (HKL). When an HKL is attached to the keyboard, certain electrical characteristics of the keyboard signal are altered. Based on these characteristics (features), differences have been identified in an accurate assertion was made about the presence of HKL.

The characteristics from which the differences were obtained were used to make distributions and compared with distance-measuring methods. An experiment was done to collect data from a number of keyboards and form two distributions (training …

Experimental Analysis Of The Effects Of Manipulations In Weighted Voting Games, Ramoni Olaoluwa Lasisi

All Graduate Theses and Dissertations, Spring 1920 to Summer 2023

This dissertation investigates weighted voting games and three methods of manipulating those games, called splitting, merging, and annexation. The manipulations involve an agent or some agents misrepresenting their identities in anticipation of gaining more power over the outcomes of games. Indeed, in open anonymous environments, manipulation can be easy and cheap to achieve. We provide clear and sufficient discussion on related work and backgrounds to motivate this research topic, which certainly deserves attention. Weighted voting games are among key cooperative games, and the manipulations considered in this dissertation are natural, and have practical applications, that are likely …

Study Of Inkjet Printing As An Ultra-Low-Cost Antenna Prototyping Method And Its Application To Conformal Wraparound Antennas For Sounding Rocket Sub-Payload, Maimaitirebike Maimaiti

All Graduate Theses and Dissertations, Spring 1920 to Summer 2023

Inkjet printing is a type of computer printing that creates an image by propelling droplets of ink onto paper. It is an attractive patterning technology that has received tremendous interest as a mass fabrication method for a variety of electronic devices due to its manufacturing flexibility and low-cost feature. However, the printing facilities that are being used, especially the inkjet printer, are very expensive. This thesis introduces an extremely cost-friendly inkjet printing method using a printer that costs less than $100. In order to verify its reliability, linearly and circularly polarized planar and conformal microstrip antennas were fabricated using the …

Most Progress Made Algorithm: Combating Synchronization Induced Performance Loss On Salvaged Chip Multi-Processors, Jacob J. Dutson

All Graduate Theses and Dissertations, Spring 1920 to Summer 2023

Most modern personal computers come with processors which contain multiple cores. Often, one or more of these cores is damaged during manufacturing. These faults are increasing as manufacturers try to make processors run faster. Many processor designs allow a damaged core to continue working after manufacturing, but these salvaged cores run slower than a fully functional core.

In an attempt to make software run as fast as possible for its users, software designers write applications that are split into multiple parts called threads. These threads can be run on separate cores at the same time and get more work done …

Minimizing The Disruption Of Traffic Flow Of Automated Vehicles During Lane Changes, Divya Desiraju

All Graduate Theses and Dissertations, Spring 1920 to Summer 2023

In intelligent transportation systems, most of the research work has focused on lane change assistant systems. No existing work considers minimizing the interruption of traffic flow by maximizing the number of lane changes while eliminating the collisions. In this thesis, we develop qualitative and quantitative approaches for minimizing the interruption of traffic flow for three lane scenarios and show that we can extend our approach to any random number of lanes. The algorithm we propose in this thesis is able to achieve the maximum number of lane changes provided that only one vehicle per group (novel concept which is described …

Process Variation Aware Dram (Dynamic Random Access Memory) Design Using Block-Based Adaptive Body Biasing Algorithm, Satyajit Desai

All Graduate Theses and Dissertations, Spring 1920 to Summer 2023

Process variation can be defined as the deviation of process parameters from its nominal specifications. Variation is induced by several fundamental effects resulting from inaccuracies in the manufacturing equipment. It is a combination of systematic effects (e.g., lithographic lens aberrations) and random effects (e.g., dopant density fluctuations). The effect of process variation becomes particularly important at smaller process nodes, where the variation accounts for a major percentage of nominal length or width of the device. Process variations translate to a wide range in performance metrics of current designs. As technology scales, these die variations are getting larger, significantly affecting performance …

Computational Fluid Dynamics Analysis Of Butterfly Valve Performance Factors, Adam Del Toro

All Graduate Theses and Dissertations, Spring 1920 to Summer 2023

Butterfly valves are commonly used to control fluid flow inside of piping systems. A butterfly valve typically consists of a metal disc formed around a central shaft, which acts as its axis of rotation. As a butterfly valve is rotated open, fluid is able to more readily flow past the valve. A butterfly valve’s design is important to understand and is commonly characterized by its own performance factors. How a butterfly valve will perform, while in operation at different opening angles and under different types of flow, is critical information for individuals planning and installing piping systems involving the valve. …

Field-Programmable Gate Array Implementation Of A Scalable Integral Image Architecture Based On Systolic Arrays, Juan Alberto De La Cruz

All Graduate Theses and Dissertations, Spring 1920 to Summer 2023

The integral image representation of an image is important for a large number of modern image processing algorithms. Integral image representations can reduce computation and increase the operating speed of certain algorithms, improving real-time performance. Due to increasing demand for real-time image processing performance, an integral image architecture capable of accelerating the calculation based on the amount of available resources is presented. Use of the proposed accelerator allows for subsequent stages of a design to have data sooner and execute in parallel. It is shown here how, with some additional resources used in the Field Programmable Gate Array (FPGA), a …

Computational Efficiency Of A Hybrid Mass Concentration And Spherical Harmonic Modeling, Nathan Piepgrass

All Graduate Theses and Dissertations, Spring 1920 to Summer 2023

Through Spherical Harmonics, one can describe complex gravitational fields. However as the order and degree of the spherical harmonics increases, the computation speed rises exponentially. In addition, for onboard applications of spherical harmonics, the processors are radiation hardened in order to mitigate negative effects of the space environment on electronics. But, those processors have outdated processing speeds, resulting in a slower onboard spherical harmonic program.

This thesis examines a partial solution to the slow computation speed of spherical harmonics programs. The partial solution was to supplant the gravity models in the flight software. The spherical harmonics gravity model can be …

Clustering Educational Digital Library Usage Data: Comparisons Of Latent Class Analysis And K-Means Algorithms, Beijie Xu

All Graduate Theses and Dissertations, Spring 1920 to Summer 2023

There are common pitfalls and neglected areas when using clustering approaches to solve educational problems. A clustering algorithm is often used without the choice being justified. Few comparisons between a selected algorithm and a competing algorithm are presented, and results are presented without validation. Lastly, few studies fully utilize data provided in an educational environment to evaluate their findings. In response to these problems, this thesis describes a rigorous study comparing two clustering algorithms in the context of an educational digital library service, called the Instructional Architect.

First, a detailed description of the chosen clustering algorithm, namely, latent class analysis …

Design Of An Adaptable Run-Time Reconfigurable Software-Defined Radio Processing Architecture, Joshua R. Templin

All Graduate Theses and Dissertations, Spring 1920 to Summer 2023

Processing power is a key technical challenge holding back the development of a high-performance software defined radio (SDR). Traditionally, SDR has utilized digital signal processors (DSPs), but increasingly complex algorithms, higher data rates, and multi-tasking needs have exceed the processing capabilities of modern DSPs. Reconfigurable computers, such as field-programmable gate arrays (FPGAs), are popular alternatives because of their performance gains over software for streaming data applications like SDR. However, FPGAs have not yet realized the ideal SDR because architectures have not fully utilized their partial reconfiguration (PR) capabilities to bring needed flexibility. A reconfigurable processor architecture is proposed that utilizes …

An Exploration Of Formal Methods And Tools Applied To A Small Satellite Software System, Russell J. Grover

All Graduate Theses and Dissertations, Spring 1920 to Summer 2023

Formal system modeling has been a topic of interest in the research community for many years. Modeling a system helps engineers understand it better and enables them to check different aspects of it to ensure that there is no undesired or unexpected behavior and that it does what it was designed to do. This thesis takes two existing tools that were created to aid in the designing of spacecraft systems and creates a layer to connect them together and allow them to be used jointly. The first tool is a library of formal descriptions used to specify spacecraft behavior in …

The Pursuit Of An Unequivocal Primary Representation, Delroy A. Brinkerhoff

All Graduate Theses and Dissertations, Spring 1920 to Summer 2023

A chief human characteristic is the desire and ability to change the world. Prior planning is crucial when those changes are complex and extensive, and require the cooperation of many people. To satisfy this need, many disciplines have developed specialized notations for representing the plans. Developers in one discipline, computer-based instruction, are burdened by the current need to use two separate notations. Instructional experts design the instruction and represent the design with a primary representation. The instruction described in a primary representation is easy to see, which makes the representation suitable for evaluation, communication, and enhancement. Programmers translate the primary …

Improved Framework For Fast And Efficient Memory-Based Frame Data Reconfiguration For Multi-Row Spanning Designs On Field Programmable Gate Arrays, Rohan Sreeram

All Graduate Theses and Dissertations, Spring 1920 to Summer 2023

Reconfigurable computing is an evolving paradigm in computer architecture where the ability to load different designs onto a field programmable gate array (FPGA) at execution time has proven useful in adapting FPGA prototypes to a wide range of applications. Reconfiguration techniques can be primarily categorized as Partial Dynamic Reconfiguration (PDR) and Partial Bitstream Relocation (PBR). PDR involves reconfiguring a single Partial Reconfiguration Region (PRR) with a partial bitstream, while PBR is targeted at reconfiguring multiple PRRs on the FPGA with a partial bitstream. Previous techniques have primarily focused on using either slower off-chip memory or on-chip memory-based solutions to store …

Bio-Inspired Distributed Constrained Optimization Technique And Its Application In Dynamic Thermal Management, Saranya Chandrasekaran

All Graduate Theses and Dissertations, Spring 1920 to Summer 2023

The stomatal network in plants is a well-characterized biological system that hypothetically solves the constrained optimization problem of maximizing CO₂ uptake from the air while constraining evaporative water loss during the process of photosynthesis. There are numerous such constrained optimization problems present in the real world as well as in computer science. This thesis work attempts to solve one such constrained optimization problem in a distributed manner by taking a cue from the dynamics of stomatal networks. The problem considered here is Dynamic Thermal Management (DTM) in a multi-processing element system in computing. There have been several approaches in …