Engineering Commons^™

Gate Level Dynamic Energy Estimation In Asynchronous Circuits Using Petri Nets, Ryan Mabry

USF Tampa Graduate Theses and Dissertations

This thesis introduces a new methodology for energy estimation in asynchronous circuits. Unlike existing probabilistic methods, this is the first simulative work for energy estimation in all types of asynchronous circuits.

The new simulative methodology is based on Petri net modeling. A real delay model is incorporated to capture both gate delays and interconnect delays. The switching activity at each gate is captured to measure the average dynamic energy consumed per request/acknowledge handshaking pair. The new type of Petri net is called Hierarchical Colored Asynchronous Hardware Petri net (HCAHPN). The HCAHPN is able to capture the temporal and spatial correlations …

A Compositional Approach To Asynchronous Design Verification With Automated State Space Reduction, Jared Ahrens

USF Tampa Graduate Theses and Dissertations

Model checking is the most effective means of verifying the correctness of asynchronous designs, and state space exploration is central to model checking. Although model checking can achieve very high verification coverage, the high degree of concurrency in asynchronous designs often leads to state explosion during state space exploration. To inhibit this explosion, our approach builds on the ideas of compositional verification. In our approach, a design modeled in a high level description is partitioned into a set of parallel components. Before state space exploration, each component is paired with an over-approximated environment to decouple it from the rest of …