Engineering Commons^™

N3asics: Designing Nanofabrics With Fine-Grained Cmos Integration, Pavan Panchapakeshan

Masters Theses 1911 - February 2014

Nanoscale-computing fabrics based on novel materials such as semiconductor nanowires, carbon nanotubes, graphene, etc. have been proposed in recent years. These fabrics employ unconventional manufacturing techniques like Nano-imprint lithography or Super-lattice Nanowire Pattern Transfer to produce ultra-dense nano-structures. However, one key challenge that has received limited attention is the interfacing of unconventional/self-assembly based approaches with conventional CMOS manufacturing to build integrated systems.

We propose a novel nanofabric approach that mixes unconventional nanomanufacturing with CMOS manufacturing flow and design rules to build a reliable nanowire-CMOS 3-D integrated fabric called N³ASICs with no new manufacturing constraints. In N³ASICs …

A Study Of The Impact Of Computational Delays In Missile Interception Systems, Ye Xu

Masters Theses 1911 - February 2014

Most publications discussing missile interception systems assume a zero computer response time. This thesis studies the impact of computer response time on single-missile single-target and multiple- missile multiple-target systems. Simulation results for the final miss distance as the computer response time increases are presented. A simple online cooperative adjustment model for multiple-missile multiple-target system is created for the purpose of studying the computer delay effect.

Scheduling Heuristics For Maximizing The Output Quality Of Iris Task Graphs In Multiprocessor Environment With Time And Energy Bounds, Rajeswaran Chockalingapuram Ravindran

Masters Theses 1911 - February 2014

Embedded real time applications are often subject to time and energy constraints. Real time applications are usually characterized by logically separable set of tasks with precedence constraints. The computational effort behind each of the task in the system is responsible for a physical functionality of the embedded system. In this work we mainly define theoretical models for relating the quality of the physical func- tionality to the computational load of the tasks and develop optimization problems to maximize the quality of the system subject to various constraints like time and energy. Specifically, the novelties in this work are three fold. …

Techniques For Detection Of Malicious Packet Drops In Networks, Vikram R. Desai

Masters Theses 1911 - February 2014

The introduction of programmability and dynamic protocol deployment in routers, there would be an increase in the potential vulnerabilities and attacks . The next- generation Internet promises to provide a fundamental shift in the underlying architecture to support dynamic deployment of network protocols. In this thesis, we consider the problem of detecting malicious packet drops in routers. Specifically, we focus on an attack scenario, where a router selectively drops packets destined for another node. Detecting such an attack is challenging since it requires differentiating malicious packet drops from congestion-based packet losses. We propose a controller- based malicious packet detection technique …

Heterogeneous Graphene Nanoribbon-Cmos Multi-State Volatile Random Access Memory Fabric, Santosh Khasanvis

Masters Theses 1911 - February 2014

CMOS SRAM area scaling is slowing down due to several challenges faced by transistors at nanoscale such as increased leakage. This calls for new concepts and technologies to overcome CMOS scaling limitations. In this thesis, we propose a multi-state memory to store multiple bits in a single cell, enabled by graphene and graphene nanoribbon crossbar devices (xGNR). This could provide a new dimension for scaling. We present a new multi-state volatile memory fabric called Graphene Nanoribbon Tunneling Random Access Memory (GNTRAM) featuring a heterogeneous integration between graphene and CMOS. A latch based on the xGNR devices is used as the …