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Articles 59821 - 59850 of 63093
Full-Text Articles in Entire DC Network
Modeling Scattered Function Data On Curved Surfaces, Chandrajit L. Bajaj, Guoliang Xu
Modeling Scattered Function Data On Curved Surfaces, Chandrajit L. Bajaj, Guoliang Xu
Department of Computer Science Technical Reports
No abstract provided.
An Adaptable Constrained Locking Protocol For High Data Contention Environments, Shalab Goel, Bharat Bhargava
An Adaptable Constrained Locking Protocol For High Data Contention Environments, Shalab Goel, Bharat Bhargava
Department of Computer Science Technical Reports
No abstract provided.
Metrics To Evaluate Academic Departments, John R. Rice
Metrics To Evaluate Academic Departments, John R. Rice
Department of Computer Science Technical Reports
No abstract provided.
Stability Analysis Of Quota Allocation Access Protocols In Ring Networks With Spatial Reuse, Leonidas Georgiadis, Wojciech Szpankowski, Leondros Tassiulas
Stability Analysis Of Quota Allocation Access Protocols In Ring Networks With Spatial Reuse, Leonidas Georgiadis, Wojciech Szpankowski, Leondros Tassiulas
Department of Computer Science Technical Reports
No abstract provided.
Automated Manpower Rostering: Techniques And Experience, C. M. Khoong, Hoong Chuin Lau, L. W. Chew
Automated Manpower Rostering: Techniques And Experience, C. M. Khoong, Hoong Chuin Lau, L. W. Chew
Research Collection School Of Computing and Information Systems
We present ROMAN, a comprehensive, generic manpower rostering toolkit that successfully handles a wide spectrum of work policies found in service organizations. We review the use of various techniques and methodologies in the toolkit that contribute to its robustness and efficiency, and relate experience gained in addressing manpower rostering problems in industry.
A Study Of Computer Hardware And Software Usage In The Wichita, Kansas Area Business Community, Cheryl L. Rogers
A Study Of Computer Hardware And Software Usage In The Wichita, Kansas Area Business Community, Cheryl L. Rogers
Electronic Theses & Dissertations
For the purpose of informationally equipping educational institutions to prepare students for a future in the business world, this study was conducted with the intent of identifying and analyzing the current computer hardware and software used for word processing, spreadsheet, database, and desktop publishing tasks in Wichita, Kansas, selected area businesses and industries. In addition, this study was designed to determine the factors the business community respondents considered in choosing their computer hardware and software. Finally, the study was intended to ascertain the length of time since computer hardware and software changes had been made within the responding companies and …
Analysis Of Myoelectrical Signals For Building A Dextrous Hand, Christopher T. Creel, Kishan Mehrotra, Chilukuri K. Mohan, Sanjay Ranka
Analysis Of Myoelectrical Signals For Building A Dextrous Hand, Christopher T. Creel, Kishan Mehrotra, Chilukuri K. Mohan, Sanjay Ranka
Electrical Engineering and Computer Science - Technical Reports
We analyze techniques for myoelectrical signals classification for the purpose of designing a multifunctional prosthetic device for human amputees. The main advantage of our system over existing models is that it is more robust, easier to work with, more general, and efficient enough to run in real time. We achieve this with the help of "Supervised Growing Cell Structures." an artificial neural network model designed by Fritzke [10]. The current paper focuses on the flexion of the index, middle and ring fingers, as these are the most difficult movements to tackle.
Bmmc Permutations On A Decmpp 12000/Sx 2000, Kristin Bruhl
Bmmc Permutations On A Decmpp 12000/Sx 2000, Kristin Bruhl
Dartmouth College Undergraduate Theses
Increasingly, modern computing problems, including many scientific and business applications, require huge amounts of data to be examined, modified, and stored. Parallel computers can be used to decrease the time needed to operate on such large data sets, by allowing computations to be performed on many pieces of data at once. For example, on the DECmpp machine used in our research, there are 2048 processors in the parallel processor array. The DECmpp can read data into each of these processors, perform a computation in parallel on all of it, and write the data out again, theoretically decreasing the execution time …
Human Creativity Through Computer Gaming, Christine Mcgavran
Human Creativity Through Computer Gaming, Christine Mcgavran
Dartmouth College Undergraduate Theses
No abstract provided.
Floorplanning For Mixed Block And Cell Designs, Arun G. Shanbhag
Floorplanning For Mixed Block And Cell Designs, Arun G. Shanbhag
Masters Theses
Floorplanning is one of the important phases of the VLSI Physical Design cycle. The quality of a floorplan is usually not evident until the routing phase. A bad floorplan can lead to an unroutable design requiring another iteration of the floorplanning phase. Use of over-the-cell routing has led to zero routing footprints. Any further reduction in area of the layout is possible only by reducing the white space or the vacant space from the floorplan, that is by improving the floorplan of the layout.
Currently, the Mixed Block and Cell (MBC) design style is gaining popularity. This evolving design style …
Wright State University College Of Engineering And Computer Science Bits And Pcs Newsletter, Volume 10, Number 6, June 1994, College Of Engineering And Computer Science, Wright State University
Wright State University College Of Engineering And Computer Science Bits And Pcs Newsletter, Volume 10, Number 6, June 1994, College Of Engineering And Computer Science, Wright State University
BITs and PCs Newsletter
A ten page newsletter created by the Wright State University College of Engineering and Computer Science that addresses the current affairs of the college.
A Recursive Least Squares Training Algorithm For Multilayer Recurrent Neural Networks, Q. Xu, K. Krishnamurthy, Bruce M. Mcmillin, Wen Feng Lu
A Recursive Least Squares Training Algorithm For Multilayer Recurrent Neural Networks, Q. Xu, K. Krishnamurthy, Bruce M. Mcmillin, Wen Feng Lu
Mechanical and Aerospace Engineering Faculty Research & Creative Works
Recurrent neural networks have the potential to perform significantly better than the commonly used feedforward neural networks due to their dynamical nature. However, they have received less attention because training algorithms/architectures have not been well developed. In this study, a recursive least squares algorithm to train recurrent neural networks with an arbitrary number of hidden layers is developed. The training algorithm is developed as an extension of the standard recursive estimation problem. Simulated results obtained for identification of the dynamics of a nonlinear dynamical system show promising results.
Identification Of Cutting Force In End Milling Operations Using Recurrent Neural Networks, Q. Xu, K. Krishnamurthy, Bruce M. Mcmillin, Wen Feng Lu
Identification Of Cutting Force In End Milling Operations Using Recurrent Neural Networks, Q. Xu, K. Krishnamurthy, Bruce M. Mcmillin, Wen Feng Lu
Mechanical and Aerospace Engineering Faculty Research & Creative Works
The problem of identifying the cutting force in end milling operations is considered in this study. Recurrent neural networks are used here and are trained using a recursive least squares training algorithm. Training results for data obtained from a SAJO 3-axis vertical milling machine for steady slot cuts are presented. The results show that a recurrent neural network can learn the functional relationship between the feed rate and steady-state average resultant cutting force very well. Furthermore, results for the Mackey-Glass time series prediction problem are presented to illustrate the faster learning capability of the neural network scheme presented here
Hardware Assists For High Performance Computing Using A Mathematics Of Arrays, H. Pottinger, W. Eatherton, L. Mullin, T. Schiefelbein
Hardware Assists For High Performance Computing Using A Mathematics Of Arrays, H. Pottinger, W. Eatherton, L. Mullin, T. Schiefelbein
Computer Science Technical Reports
Work in progress at the University of Missouri - Rolla on hardware assists for high performance computing and communication is presented. This research consists of a field programmable gate array based rapid prototyping environment (Chameleon) being used to evaluate hardware architectures for speedup of array partitioning and routing algorithms. These algorithms have been developed using a Mathematics of Arrays (MOA) and are optimal in the sense that they reduce normal array indexing operations to a series of primitive additions based on array shape. The method is simple yet powerful, produces algorithms which are provably correct, and are independent of dimensionality. …
Teaching Parallel Computing To Freshmen, Donald Johnson, David Kotz, Fillia Makedon
Teaching Parallel Computing To Freshmen, Donald Johnson, David Kotz, Fillia Makedon
Dartmouth Scholarship
Parallelism is the future of computing and computer science and should therefore be at the heart of the CS curriculum. Instead of continuing along the evolutionary path by introducing parallel computation “top down” (first in special junior-senior level courses), we are taking a radical approach and introducing parallelism at the earliest possible stages of instruction. Specifically, we are developing a completely new freshman-level course on data structures that integrates parallel computation naturally, and retains the emphasis on laboratory instruction. This will help to steer our curriculum as expeditiously as possible toward parallel computing.
Our approach is novel in three distinct …
An Fpga Based Reconfigurable Coprocessor Board Utilizing A Mathematics Of Arrays, H. Pottinger, W. Eatherton, T. Schiefelbein, L. Mullin, R. Ziegler
An Fpga Based Reconfigurable Coprocessor Board Utilizing A Mathematics Of Arrays, H. Pottinger, W. Eatherton, T. Schiefelbein, L. Mullin, R. Ziegler
Computer Science Technical Reports
Work in progress at the University of Missouri-Rolla on hardware assists for high performance computing is presented. This research consists of a novel field programmable gate array (FPGA) based reconfigurable coprocessor board (the Chameleon Coprocessor) being used to evaluate hardware architectures for speedup of array computation algorithms. These algorithms have been developed using a Mathematics of Arrays (MOA) and are optimal in the sense that they reduce normal array cartesian indexing operations to a series of primitive additions and offsets based on array shape. The method is simple yet powerful, produces algorithms which are provably correct, and are independent of …
Qualitative Study Of The Symplectic Stormer-Verlet Integrator, D. J. Hardy, D. I. Okunbor
Qualitative Study Of The Symplectic Stormer-Verlet Integrator, D. J. Hardy, D. I. Okunbor
Computer Science Technical Reports
Symplectic numerical integrators, such as the Stormer-Verlet method, are useful in preserving certain important properties that are not preserved by conventional numerical integrators. This paper analyzes the Stormer-Verlet method as applied to the simple harmonic model, which is an important model for molecular dynamics simulations. Restricting our attention to the one-dimensional case, both the exact solution and the Stormer-Verlet solution to this model are expressed as functions of the number of time steps taken, and then both of these functions are interpreted geometrically. The paper shows the existence of an upper bound on the error from the Stormer-Verlet method, and …
A Conceptual Model For Multimedia Database Systems, Shunge Li, Xiangning Liu, Bharat Bhargava
A Conceptual Model For Multimedia Database Systems, Shunge Li, Xiangning Liu, Bharat Bhargava
Department of Computer Science Technical Reports
No abstract provided.
Scalar Field Modeling & Visualization On The Intel Delta, Chandrajit Bajaj, Kwun-Nan Lin
Scalar Field Modeling & Visualization On The Intel Delta, Chandrajit Bajaj, Kwun-Nan Lin
Department of Computer Science Technical Reports
No abstract provided.
Processing Pde Interface Conditions, John R. Rice
Processing Pde Interface Conditions, John R. Rice
Department of Computer Science Technical Reports
No abstract provided.
Converting A Rational Surface To A Standard Rational Bernstein-Bezier Surface, Chandrajit Bajaj, Guoliang Xu
Converting A Rational Surface To A Standard Rational Bernstein-Bezier Surface, Chandrajit Bajaj, Guoliang Xu
Department of Computer Science Technical Reports
No abstract provided.
Sparse Smooth Connection Between Bezier/Bspline Curves, Chandrajit Bajaj, Guoliang Xu
Sparse Smooth Connection Between Bezier/Bspline Curves, Chandrajit Bajaj, Guoliang Xu
Department of Computer Science Technical Reports
No abstract provided.
An Analysis Of The Paging Activity Of Parallel Programs, Kuei Yu Wang, Dan C. Marinescu
An Analysis Of The Paging Activity Of Parallel Programs, Kuei Yu Wang, Dan C. Marinescu
Department of Computer Science Technical Reports
No abstract provided.
Eppod: A Problem Solving Environment For Parallel Electronic Prototyping Of Physical Object Design, Poting Wu, Elias N. Houstis, John R. Rice
Eppod: A Problem Solving Environment For Parallel Electronic Prototyping Of Physical Object Design, Poting Wu, Elias N. Houstis, John R. Rice
Department of Computer Science Technical Reports
No abstract provided.
Curvature Continuous Spline Surfaces Over Irregular Meshes, Jörg Peters
Curvature Continuous Spline Surfaces Over Irregular Meshes, Jörg Peters
Department of Computer Science Technical Reports
No abstract provided.
Indexing And Distributing A General Patterned Spare Array, Daria Dooling, Lenore Mullin
Indexing And Distributing A General Patterned Spare Array, Daria Dooling, Lenore Mullin
Computer Science Technical Reports
High performance computing and communication (HPCC) requires that space and time usage are kept to a minimum when solving very large scientific problems. These problems often are represented by sparse systems, and in particular banded systems. In this paper, a new banded array index algorithm is presented that uses substantially less memory than the BLAS (Basic Linear Algebra Subroutines) representation. The algorithm presented here works for multi-dimensional arrays and on all bandwidths. It is visualized as a layer between the applications and the data, thus shielding the caller from the complexities of the sparse representation. Information is returned to the …
Ccsp - A Formal System For Distributed Program Debugging, Beth Arrowsmith, Bruce Mcmillin
Ccsp - A Formal System For Distributed Program Debugging, Beth Arrowsmith, Bruce Mcmillin
Computer Science Technical Reports
One of the major problems with programming in a parallel/distributed environment is the difficulty in debugging the programs due to their complex interactions. One can have results that appear random, but when given a complete knowledge of the specific run-time behavior, the results are foregone. Unfortunately, this complete knowledge is not generally attainable in a distributed system. In order to develop a system for debugging distributed program and, for the more general case, ensuring their correctness at run-time, we built a distributed execution enviromnent based on Hoare's CSP [5] which allows for the execution and evaluation of embedded assertions within …
Parallel Adaptive Mesh Refinement Algorithms, Mustafa Keskin, Fikret Ercal
Parallel Adaptive Mesh Refinement Algorithms, Mustafa Keskin, Fikret Ercal
Computer Science Technical Reports
This study is aimed at developing 2D parallel adaptive mesh refinement algorithms for engineering applications such as penetration mechanics, manufacturing and combustion which use the finite element method for simulation. A new algorithmic approach, called piecewise adaptive mesh refinement for parallelization, is developed and implemented to run on a sequential machine. Performance of the new method is compared against a conventional advancing front technique proposed earlier. A parallel implementation model to run on a massively parallel computer is proposed and its expected efficiency is analyzed theoretically. Furthermore, some issues concerning parallelization and task partitioning are also discussed. In addition, a …
A Deterministic Membership Algorithm In Asynchronous Distributed Systems, P. Su, B. Mcmillin, A. Dekock
A Deterministic Membership Algorithm In Asynchronous Distributed Systems, P. Su, B. Mcmillin, A. Dekock
Computer Science Technical Reports
This work presents a deterministic asynchronous membership protocol (AMP). Conceptually a membership algorithm provides a means of recruiting members (machines) in a distributed system. Currently most of the research in membership recruiting emphasizes how to obtain the members after a machine fail-stop has occurred during the system operation, and the membership algorithms proposed arc non-deterministic. This work extends the research to develop a deterministic membership algorithm to recruit machines dynamically at the system cold-start. Once it is possible to recruit machines at system cold-start, then it is trivial to recruit members after a machine fail-stop has occurred during the system …
Using Temporal Subsumption To Generate Efficient Error-Detecting Distributed Algorithms, Martina Schollmeyer, Bruce Mcmillin
Using Temporal Subsumption To Generate Efficient Error-Detecting Distributed Algorithms, Martina Schollmeyer, Bruce Mcmillin
Computer Science Technical Reports
Distributed algorithms can use executable assertions, which can be derived from program verificatioll or specified in an ad hoc manner, to detect. errors at run-time. However, there may be more assertions available than are really unecessary, and embedding all of them into the program to be checked at run-time would make error-detection very inefficient. For safety-critical systems we often need to make decisions very quickly and cannot allow too much time to be spent on error detection.
The new technique of temporal submission, which is introduced in this dissertation, examines the dependencies between the individual assertions along program execution paths. …