Digital Commons Network^™

Documentation Requirements For Software Maintenance, Timothy S. Mcarthur

Theses and Dissertations

This study investigated the requirement for documentation during the maintenance phase of the software life cycle. Without proper documentation, maintenance personnel are not able to effectively understand the design of a software system and spend many hours performing design recovery before any type of maintenance can be performed. A review of existing information showed a wide range of opinion among the experts in the field of software maintenance and was not conclusive. A survey of Air Force software maintenance personnel was then conducted to determine the need, availability, and tailoring results of the documents listed on DOD-STD 2167A. The analysis …

Gcache: A Generalized Caching Mechanism, Douglas E. Comer, Shawn Ostermann

Department of Computer Science Technical Reports

No abstract provided.

Effects Of Replication On The Duration Of Failure In Distributed Databases, Donald B. Johnson, Larry Raab

Computer Science Technical Reports

Replicating data objects has been suggested as a means of increasing the performance of a distributed database system in a network subject to link and site failures. Since a network may partition as a consequence of such failures, a data object may become unavailable from a given site for some period of time. In this paper we study duration failure, which we define as the length of time, once the object becomes unavailable from a particular site, that the object remains unavailable. We show that, for networks composed of highly-reliable components, replication does not substantially reduce the duration of failure. …

An Organization Of Sparse Gauss Elimination For Solving Pdes On Distributed Memory Machines, Mo Mu, John R. Rice

Department of Computer Science Technical Reports

No abstract provided.

Unstructured Scheduling In Parallel Pde Sparse Solvers On Distributed Memory Machines, Mo Mu, John R. Rice

Department of Computer Science Technical Reports

No abstract provided.

Constructively Typed Timed Automata, J. F. Peters Iii

Electrical Engineering and Computer Science - Technical Reports

A new class of communicating automata called typed Timed lnput/Output Automata (tTAi/os) is introduced. A tTAi/o is a predicate automaton used for specifying and reasoning about real-time systems. The typing discipline suggested for predicate automata is in the tradition of Martin-Löf's constructive type theory. A type A is a proposition, which is defined when a prescription for constructing a proof of A is given. A fragment of Girard's linear logic is used in classifying state types. An illustration of the use of tTAi/os in specifying a light-controller is presented. An abstract program is extracted during a proof of an automaton …

Wright State University College Of Engineering And Computer Science Bits And Pcs Newsletter, Volume 7, Number 8, November 1991, College Of Engineering And Computer Science, Wright State University

BITs and PCs Newsletter

A ten page newsletter created by the Wright State University College of Engineering and Computer Science that addresses the current affairs of the college.

An Experimental Sequence Examining The Effect Of Task Type, Memory Condition, And Display Presentation Type On Performance Time And Error Rate, Using Columnar Table Versus Vertical Bar Graph Versus Line Graph, Suparna Das

Theses

A total of 126 subjects at various levels of school and a health related manufacturing firm participated in three experiments that compared Tables, Line graphs and Bar graphs forms of data presentation. The experiments were performed each consisting of a training task followed by answering some questions based on the presented material. The experimental series were presented to six groups. Group 1, 3, 5 viewed Line graphs, Tables or Bar graphs respectively while answering the questions while the other three groups answered questions based on memory of either Line graphs, Table or Bar graph presentation.

The independent variables were:

1. Memory …

A Common Application Model For Interfacing With Advanced Program To Program Communication/Vm, Joseph Viviano Jr.

Theses

The Merrill Lynch data processing environment is composed of a conglomeration of applications which reside on various platforms. LAN and minicomputer based applications coexist with those making their home in the mainframe arena. Unfortunately, coexistence does not imply cooperation, data uniformity, data centralization or coordinated application development. Within the Merrill Lynch mainframe arena alone there are two operating systems which reside across several computing complexes, MVS (Multiple Virtual Storage) and VM (Virtual Machine). Critical business applications and data are unique to each of these environments. The problem lies in the need for cooperative processing and sharing of distributed data among …

Complexity Of Network Reliability And Optimal Database Placement Problems, Donald B. Johnson, Larry Raab

Computer Science Technical Reports

A fundamental problem of distributed database design in an existing network where components can fail is finding an optimal location at which to place the database in a centralized system or copies of each data item in a decentralized or replicated system. In this paper it is proved for the first time exactly how hard this placement problem is under the measure of data availability. Specifically, we show that the optimal placement problem for availability is #P- complete, a measure of intractability at least as severe as NP-completeness. Given the anticipated computational difficulty of finding an exact solution, we go …

Electronic Skeletons: Modeling Skeletal Structures With Piecewise Algebraic Surfaces, Chanderjit L. Bajaj

Department of Computer Science Technical Reports

No abstract provided.

Portable 3d Graphics In A Heterogeneous Distributed Environment, Vinod Anupam, Chanderjit L. Bajaj, Malcolm C. Fields, Andrew V. Royappa

Department of Computer Science Technical Reports

No abstract provided.

The Shastra Distributed And Collaborative Geometric Design Environment, Vinod Anupam, Chanderjit L. Bajaj, Andrew V. Royappa

Department of Computer Science Technical Reports

No abstract provided.

Formal Generation Of Executable Assertions For A Fault-Tolerant Parallel Matrix Relaxation, Hanan Lutfiyya, Bruce M. Mcmillin

Computer Science Technical Reports

No abstract provided.

Visual Interaction: A Link Between Perception And Problem Solving, Erika Rogers, Ronald C. Arkin

Computer Science and Software Engineering

The approach taken in this research is to develop a cognitive model of how a human observer extracts information from a visual display and then uses this perceptual information in a decision-making task. Knowledge about this relationship provides information about the occurrence of perceptual events in the course of problem-solving activities, and suggests that perceptual assistance in the form of image enhancements is a useful supplement to the user’s own abilities. This knowledge is then to be embedded in an intelligent computerized assistant which is designed to facilitate and stimulate the human problem-solving process.

Distributed Memory Compiler Methods For Irregular Problems -- Data Copy Reuse And Runtime Partitioning, Raja Das, Ravi Ponnusamy, Joel Saltz, Dimitri Mavriplis

Electrical Engineering and Computer Science - Technical Reports

This paper outlines two methods which we believe will play an important role in any distributed memory compiler able to handle sparse and unstructured problems. We describe how to link runtime partitioners to distributed memory compilers. In our scheme, programmers can implicitly specify how data and loop iterations are to be distributed between processors. This insulates users from having to deal explicitly with potentially complex algorithms that carry out work and data partitioning. We also describe a viable mechanism for tracking and reusing copies of off-processor data. In many programs, several loops access the same off-processor memory locations. As long …

A Practical Hierarchical Model Of Parallel Computation Ll: Binary Tree And Fft Algorithms, Todd Heywood, Sanjay Ranka

Electrical Engineering and Computer Science - Technical Reports

A companion paper has introduced the Hierarchical PRAM (H-PRAM) model of parallel computation, which achieves a good balance between simplicity of usage and reflectivity of realistic parallel computers. In this paper, we demonstrate the usage of the model by designing and analyzing various algorithms for computing the complete binary tree, and the FFT/butterfly graph. By concentrating on two problems, we are able to demonstrate the results of different combinations of organizational strategies and different types of sub-models of the H-PRAM. The philosophy in algorithm design is to maximize the number of processors P that are efficiently usable with respect to …

Approaches To High Speed Networks, Frank Charles Paterra

Computer Science Theses & Dissertations

This work investigates possible methods by which existing potentially available communication bandwidth can be used by communication intensive applications. Presently fiber optic media are available that can provide multiple gigabits of throughput. Unfortunately, because of the computation overhead required to insure that data are reliably transmitted this capacity has not been tapped.

A survey of work toward enabling the use of the potential bandwidth is presented. The parallel paradigm is identified as a strong candidate for providing significant increases in system usable bandwidth. Performing communication processing in parallel, however, presents the developer with several implementation options. These options are considered …

Domain Limitations And Interface Requirements For Expert Developed Knowledge Based Systems, Bernard Lee Lewis

Engineering Management & Systems Engineering Theses & Dissertations

The expanded use of graphical, case-based and object oriented techniques in expert systems creation has made it more practical for domain experts to develop their own applications. This thesis focuses on the elements necessary in an expert/developer interface and looks at various forms and techniques that exemplify such an approach. The spreadsheet metaphor is used for an interface or managed set of interfaces that a domain expert can use in building his own expert system or prototype. criteria are established for such interfaces and recent commercial offerings that make expert-created knowledge-bases more practical are reviewed for techniques that qualify. Approaches …

Constrained-Latency Storage Access: A Survey Of Application Requirements And Storage System Design Approaches, Richard Staehli, Jonathan Walpole

Computer Science Faculty Publications and Presentations

Applications with Constrained Latency Storage Access (CLSA) are those that have large storage needs and hard constraints on the amount of latency they can tolerate. Such applications present a problem when the storage technology that is cost effective and large enough cannot meet their latency constraints for demand fetching. Examples are found in the developing field of multimedia computing and, to a lesser extent, in real-time database literature. This paper examines the nature of timing constraints at the application-storage interface and defines a classification for both the synchronization constraints of the application and the latency characteristics of the storage system. …

Cascading Space Efficient Variation Of The Lzw Algorithm And Arithmetic Coding, Shobha Raj

Theses

Two known compression algorithms appropriate for communication are LZW and the Arithmetic Coding method. Both are adaptive and require no extra communication from the encoder to the decoder. Here we have considered a space efficient variation of the LZW algorithm which achieves better compression.

We present a scheme to cascade the space efficient variation of the LZW algorithm with Arithmetic Coding into a space efficient data compression algorithm which achieves a higher compression ratio and is appropriate for communication.

Stability Criteria For Yet Another Multidimensional Distributed System, Leonidas Georgiadis, Wojciech Szpankowski

Department of Computer Science Technical Reports

No abstract provided.

Composite Stock Cutting Through Simulated Annealing, Pipatpong Poshyanonda, Cihan H. Dagli

Computer Science Technical Reports

This paper explores the use of Simulated Annealing as an optimization technique for the problem Composite Material Stock Cutting. The shapes are not constrained to be convex polygons or even regular shapes. However, due to the composite nature of the material, the orientation of the shapes on the stock is restricted. For placements of various shapes, we show how to determine a cost function, annealing parameters, and performance.

Fault-Tolerant Parallel Matrix Multiplication With One Iteration Fault Detection Latency, Chul-Eui Hong, Bruce M. Mcmillin

Computer Science Technical Reports

The checksum technique is a low cost method to detect errors in matrix operations performed by processor arrays. The fault detection of this method is done only at problem termination, so this method is not an effective fault tolerance technique for large scale matrix multiplication.

This paper presents a new algorithm, the ID algorithm, which minimizes the fault-detection latency, In the ID algorithm, a fault is detected as soon a5 the fault occurs instead of at problem termination. For 112 processors, the fault-latency time of the ID algorithm is l/11 of that of checksum algorithm with a run-time penalty of …

Fault-Tolerant Parallel Matrix Multiplication With One Iteration Fault Detection Latency, Chul-Eui Hong, Bruce M. Mcmillin

Computer Science Technical Reports

The checksum technique is a low cost method to detect errors in matrix operations performed by processor arrays. The fault detection of this method is done only at problem termination, so this method is not an effective fault tolerance technique for large scale matrix multiplication.

This paper presents a new algorithm, the ID algorithm, which minimizes the fault-detection latency, In the ID algorithm, a fault is detected as soon a5 the fault occurs instead of at problem termination. For 112 processors, the fault-latency time of the ID algorithm is l/11 of that of checksum algorithm with a run-time penalty of …

Composite Stock Cutting Through Simulated Annealing, Pipatpong Poshyanonda, Cihan H. Dagli

Computer Science Technical Reports

This paper explores the use of Simulated Annealing as an optimization technique for the problem Composite Material Stock Cutting. The shapes are not constrained to be convex polygons or even regular shapes. However, due to the composite nature of the material, the orientation of the shapes on the stock is restricted. For placements of various shapes, we show how to determine a cost function, annealing parameters, and performance.

Binary Perfect Weighted Coverings (Pwc) I. The Linear Case, G. D. Cohen, S. N. Litsyn, H. F. Mattson Jr

Electrical Engineering and Computer Science - Technical Reports

This paper deals with an extension of perfect codes to fractional (or weighted) coverings. We shall derive a Lloyd theorem --- a strong necessary condition of existence---and start a classification of these perfect coverings according to their diameter. We illustrate by pointing to list decoding.

A Comparison Of Load Balancing Algorithms For Parallel Computations, N. Mansouri, Geoffrey C. Fox

Electrical Engineering and Computer Science - Technical Reports

Three physical optimization methods are considered in this paper for load balancing parallel computations. These are simulated annealing, genetic algorithms, and neural networks. Some design choices and the inclusion of additional steps lead to new versions of the algorithms with different solution qualities and execution times. The performances of these versions are critically evaluated and compared for test cases with different topologies and sizes. Orthogonal recursive coordinate bisection is also included in the comparison as a typical simple deterministic method. Simulation results show that the algorithms have diverse properties. Hence, different algorithms can be applied to different problems and requirements. …

Parallel Genetic Algorithms With Application To Load Balancing For Parallel Computing, N. Mansouri, Geoffrey C. Fox

Electrical Engineering and Computer Science - Technical Reports

A new coarse grain parallel genetic algorithm (PGA) and a new implementation of a data-parallel GA are presented in this paper. They are based on models of natural evolution in which the population is formed of discontinuous or continuous subpopulations. In addition to simulating natural evolution, the intrinsic parallelism in the two PGA's minimizes the possibility of premature convergence that the implementation of classic GA's often encounters. Intrinsic parallelism also allows the evolution of fit genotypes in a smaller number of generations in the PGA's than in sequential GA's, leading to superlinear speed-ups. The PGA's have been implemented on a …

Visual Knowledge Query Language As A Front-End To Relational Systems, Keng Siau, Kok Phuang Tan, Hock Chuan Chan

Research Collection School Of Computing and Information Systems

Relational query languages like SQL and QUEL require the users to understand the complex database structure. This is a burden on end users, especially novice end users who access the database on a casual and infrequent basis. To alleviate the need to know the logical database organization, this paper proposes the use of a semantic data model, known as the Enhanced Entity-Relationship (EER) model, as a front-end to the relational systems. A formal, high-level Visual Knowledge Query Language (VKQL) has also been designed for this interface. This language provides for knowledge abstraction as the user communicates only domain knowledge with …