Physical Sciences and Mathematics Commons^™

Asynchronous Mips Processors: Educational Simulations, Robert L. Webb

Master's Theses

The system clock has been omnipresent in most mainstream chip designs. While simplifying many design problems the clock has caused the problems of clock skew, high power consumption, electromagnetic interference, and worst-case performance. In recent years, as the timing constraints of synchronous designs have been squeezed ever tighter, the efficiencies of asynchronous designs have become more attractive. By removing the clock, these issues can be mitigated. How- ever, asynchronous designs are generally more complex and difficult to debug. In this paper I discuss the advantages of asynchronous processors and the specifics of some asynchronous designs, outline the roadblocks to asynchronous …

Wii-Mote Head Tracking: A Three Dimensional Virtual Reality Display, David Fairman

Computer Engineering

The goal of this project is to create a customizable three dimensional virtual reality display on a system available to any non-technical user. This System will use the infrared camera component of a standard Nintendo Wii-mote to track a user's head motions in all six major directions. The virtual reality will be a customizable image projected onto a screen or simply shown on a computer or TV monitor. In order to appear 3-dimensional, the image will continually change according to the position of the user's head. As the user moves their head to the left and right, portions of the …

Max Flow Spill Code Placement Algorithm Implemented In Gcc 4.4.3, Stephen Robert Beard

Computer Engineering

The placement of spill code plays an important role in the register allocator of an optimizing compiler. Many computer architectures possess a register linkage convention that dictates which registers are preserved across function calls and which are not. This project addresses the problem of optimizing spill code that is associated with register linkage conventions.

This algorithm was created by Dr. Chris Lupo and is described in the paper Beyond Register Allocation: a Novel Algorithm for Spill-Code Placement. The algorithm was implemented for GCC 2.5.7 for a PA-RISC architecture [4]. The work in this project will involve porting the existing code …

Hidra: Hierarchical Inter-Domain Routing Architecture, Bryan Clevenger

Master's Theses

As the Internet continues to expand, the global default-free zone (DFZ) forwarding table has begun to grow faster than hardware can economically keep pace with. Various policies are in place to mitigate this growth rate, but current projections indicate policy alone is inadequate. As such, a number of technical solutions have been proposed. This work builds on many of these proposed solutions, and furthers the debate surrounding the resolution to this problem. It discusses several design decisions necessary to any proposed solution, and based on these tradeoffs it proposes a Hierarchical Inter-Domain Routing Architecture - HIDRA, a comprehensive architecture with …

Pretty Lights, Nicholas (Nick) Delmas, Matthew (Matt) Maniaci

Computer Engineering

Digital media players often include a visualization component that allows a user to watch a visualization synchronized to their music or videos. This project uses the visualization plugin API of an existing media playback program (WinAmp) but it displays its visuals using physical LED lights. Instead of outputting visuals to the computer screen, data is sent over USB to a micro controller that runs the LED lights. This project aims to give users a more visceral visual experience than traditional visualizations on the computer screen.