Open Access. Powered by Scholars. Published by Universities.®

Physical Sciences and Mathematics Commons

Open Access. Powered by Scholars. Published by Universities.®

Articles 1 - 3 of 3

Full-Text Articles in Physical Sciences and Mathematics

Determination Of The Electric Field Intensity And Space Charge Density Versus Height Prior To Triggered Lightning, Christopher J. Biagi, Martin A. Uman, Jay Gopalakrishnan, J. D. Hill, Vladimir A. Rakov, T. Ngin, Douglas M. Jordan Aug 2011

Determination Of The Electric Field Intensity And Space Charge Density Versus Height Prior To Triggered Lightning, Christopher J. Biagi, Martin A. Uman, Jay Gopalakrishnan, J. D. Hill, Vladimir A. Rakov, T. Ngin, Douglas M. Jordan

Mathematics and Statistics Faculty Publications and Presentations

We infer the vertical profiles of space charge density and electric field intensity above ground by comparing modeling and measurements of the ground-level electric field changes caused by elevating grounded lightning-triggering wires. The ground-level electric fields at distances of 60 m and 350 m were measured during six wire launches that resulted in triggered lightning. The wires were launched when ground-level electric fields ranged from 3.2 to 7.6 kV m−1 and the triggering heights ranged from 123 to 304 m. From wire launch time to lightning initiation time, the ground-level electric field reduction at 60 m ranged from 2.2 …


Interview With Adam Boesel, Green Micro Gym, 2011 (Audio), Adam Boesel Jul 2011

Interview With Adam Boesel, Green Micro Gym, 2011 (Audio), Adam Boesel

All Sustainability History Project Oral Histories

Interview of Adam Boesel by Teresa Celestine at Green Micro Gym Portland, Oregon on July 29th, 2011.

The interview index is available for download.


Floorplan Design And Yield Enhancement Of 3-D Integrated Circuits, Rajeev Kumar Nain Jan 2011

Floorplan Design And Yield Enhancement Of 3-D Integrated Circuits, Rajeev Kumar Nain

Dissertations and Theses

We have developed a placement-aware 3-D floorplanning algorithm that enables additional wirelength reduction by planning for 3-D placement of logic gates in selected circuit modules during the floorplanning stage. Thus it also bridges the existing gap between 3-D floorplanning and 3-D placement. To reduce the solution space of 3-D floorplanning which is known to be an NP-hard problem, we derive a set of feasibility conditions on the topological representation of a floorplan. In addition, we have designed a fast module packing algorithm that satisfies a set of constraints for placement-aware 3-D floorplanning. Furthermore, we have designed an efficient evolutionary algorithm …