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Full-Text Articles in Engineering

Preference Learning And Similarity Learning Perspectives On Personalized Recommendation, Duy Dung Le Sep 2019

Preference Learning And Similarity Learning Perspectives On Personalized Recommendation, Duy Dung Le

Dissertations and Theses Collection (Open Access)

Personalized recommendation, whose objective is to generate a limited list of items (e.g., products on Amazon, movies on Netflix, or pins on Pinterest, etc.) for each user, has gained extensive attention from both researchers and practitioners in the last decade. The necessity of personalized recommendation is driven by the explosion of available options online, which makes it difficult, if not downright impossible, for each user to investigate every option. Product and service providers rely on recommendation algorithms to identify manageable number of the most likely or preferred options to be presented to each user. Also, due to the limited screen …


Developing 5gl Concepts From User Interactions, David Stuckless Meyer Jul 2019

Developing 5gl Concepts From User Interactions, David Stuckless Meyer

Masters Theses

In the fulfilling of the contracts generated in Test Driven Development, a developer could be said to act as a constraint solver, similar to those used by a 5th Generation Language(5GL). This thesis presents the hypothesis that 5GL linguistic mechanics, such as facts, rules and goals, will be emergent in the communications of developer pairs performing Test Driven Development, validating that 5GL syntax is congruent with the ways that practitioners communicate. Along the way, nomenclatures and linguistic patterns may be observed that could inform the design of future 5GL languages.


A Compiler Target Model For Line Associative Registers, Paul S. Eberhart Jan 2019

A Compiler Target Model For Line Associative Registers, Paul S. Eberhart

Theses and Dissertations--Electrical and Computer Engineering

LARs (Line Associative Registers) are very wide tagged registers, used for both register-wide SWAR (SIMD Within a Register )operations and scalar operations on arbitrary fields. LARs include a large data field, type tags, source addresses, and a dirty bit, which allow them to not only replace both caches and registers in the conventional memory hierarchy, but improve on both their functions. This thesis details a LAR-based architecture, and describes the design of a compiler which can generate code for a LAR-based design. In particular, type conversion, alignment, and register allocation are discussed in detail.