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University of Nebraska - Lincoln
Department of Computer Science and Engineering: Dissertations, Theses, and Student Research
Computer Architecture; Chip Multiprocessor; Memory Hierarchy; Last Level Cache; Spatiotemporal Capacity Management
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Spatiotemporal Capacity Management For The Last Level Caches Of Chip Multiprocessors, Dongyuan Zhan
Spatiotemporal Capacity Management For The Last Level Caches Of Chip Multiprocessors, Dongyuan Zhan
Department of Computer Science and Engineering: Dissertations, Theses, and Student Research
Judicious management of on-chip last-level caches (LLC) is critical to alleviating the memory wall of chip multiprocessors (CMP). Although there already exist many LLC management proposals, belonging to either the spatial or temporal dimension, they fail to capture and utilize the inherent interplays between the two dimensions in capacity management. Therefore, this dissertation is targeted at exploring and exploiting the spatiotemporal interactions in LLC capacity management to improve CMPs' performance. Based on this general idea, we address four specific research problems in the dissertation.
For the private LLC organization, prior-art proposals can improve the efficacy of inter-core cooperative caching at …