Open Access. Powered by Scholars. Published by Universities.®
Articles 1 - 12 of 12
Full-Text Articles in Engineering
Emi Mitigation With Multilayer Power-Bus Stacks And Via Stitching Of Reference Planes, Xiaoning Ye, David M. Hockanson, Min Li, Yong Ren, Wei Cui, James L. Drewniak, Richard E. Dubroff
Emi Mitigation With Multilayer Power-Bus Stacks And Via Stitching Of Reference Planes, Xiaoning Ye, David M. Hockanson, Min Li, Yong Ren, Wei Cui, James L. Drewniak, Richard E. Dubroff
Electrical and Computer Engineering Faculty Research & Creative Works
General methods for reducing printed circuit board (PCB) emissions over a broad band of high frequencies are necessary to meet EMI requirements, as processors become faster and more powerful. One mechanism by which EMI can be coupled off a PCB or multichip module (MCM) structure is from high-frequency fringing electric fields on the dc power and reference planes at the substrate periphery An approach for EMI mitigation by stitching multiple ground planes together along the periphery of multilayer PCB power-bus stacks with closely spaced vias is reported and quantified in this paper. Power-bus noise induced EMI and coupling from the …
Quantifying Smt Decoupling Capacitor Placement In Dc Power-Bus Design For Multilayer Pcbs, Jun Fan, James L. Drewniak, James L. Knighten, Norman W. Smith, Antonio Orlandi, Thomas Van Doren, Todd H. Hubing, Richard E. Dubroff
Quantifying Smt Decoupling Capacitor Placement In Dc Power-Bus Design For Multilayer Pcbs, Jun Fan, James L. Drewniak, James L. Knighten, Norman W. Smith, Antonio Orlandi, Thomas Van Doren, Todd H. Hubing, Richard E. Dubroff
Electrical and Computer Engineering Faculty Research & Creative Works
Noise on a dc power-bus that results from device switching, as well as other potential mechanisms, is a primary source of many signal integrity (SI) and electromagnetic interference (EMI) problems. Surface mount technology (SMT) decoupling capacitors are commonly used to mitigate this power-bus noise. A critical design issue associated with this common practice in high-speed digital designs is placement of the capacitors with respect to the integrated circuits (ICs). Local decoupling, namely, placing SMT capacitors in proximity to ICs, is investigated in this study. Multilayer PCB designs that employ entire layers or area fills for power and ground in a …
Dc Power Bus Noise Isolation With Power Islands, Wei Cui, Jun Fan, Hao Shi, James L. Drewniak
Dc Power Bus Noise Isolation With Power Islands, Wei Cui, Jun Fan, Hao Shi, James L. Drewniak
Electrical and Computer Engineering Faculty Research & Creative Works
Segmented power planes are often used for DC power bus noise isolation in multi-layered printed circuit board (PCB) designs. To achieve a desirable noise isolation, different power plane segmentations can be used. A suitable modeling approach, as well as measurements, were employed to study the power bus isolation with several power plane segmentation configurations. The studied geometries included power island designs connected with a conducting bridge, a ferrite bead, and a π-filter. In addition, different conducting bridge widths and power island gap widths were analyzed, and compared. The modeled and measured results show that power plane segmentations with proper designs …
An Emi Estimate For Shielding-Enclosure Evaluation, Min Li, James L. Drewniak, S. Radu, Joe Nuebel, Todd H. Hubing, Richard E. Dubroff, Thomas Van Doren
An Emi Estimate For Shielding-Enclosure Evaluation, Min Li, James L. Drewniak, S. Radu, Joe Nuebel, Todd H. Hubing, Richard E. Dubroff, Thomas Van Doren
Electrical and Computer Engineering Faculty Research & Creative Works
A relatively simple, closed-form expression has been developed to estimate the EMI from shielding enclosures due to coupling from interior sources through slots and apertures at the enclosure cavity modes. A power-balance method, Bethe's (1944) small-hole theory, and empirically developed formulas for the relation between radiation, and slot length and number of slots, were employed to estimate an upper bound on the radiated EMI from shielding enclosures. Comparisons between measurements and estimated field strengths suitably agree within engineering accuracy.
Differential Signalling In Pcbs: Modeling And Validation Of Dielectric Losses And Effects Of Discontinuities, R. Araneo, Chen Wang, Xiaoxiong Gu, S. Celozzi, James L. Drewniak
Differential Signalling In Pcbs: Modeling And Validation Of Dielectric Losses And Effects Of Discontinuities, R. Araneo, Chen Wang, Xiaoxiong Gu, S. Celozzi, James L. Drewniak
Electrical and Computer Engineering Faculty Research & Creative Works
This paper focuses on differential signal transmission above ground planes with gaps, taking into account the dielectric and conductive losses of the substrate. An equivalent lumped-circuit is proposed and its suitability is investigated by comparing the obtained numerical results with the measured data. Furthermore the differential to common mode conversion of the waves, while crossing the gap, is theoretically analyzed and experimentally verified.
Grounding Of Heatpipe/Heatspreader And Heatsink Structures For Emi Mitigation, Chen Wang, James L. Drewniak, D. Wang, Ray Alexander, James L. Knighten, David M. Hockanson
Grounding Of Heatpipe/Heatspreader And Heatsink Structures For Emi Mitigation, Chen Wang, James L. Drewniak, D. Wang, Ray Alexander, James L. Knighten, David M. Hockanson
Electrical and Computer Engineering Faculty Research & Creative Works
EMI problems caused by the presence of heatpipe/heatspreader and heatsink structures in a high-speed design are well known in engineering practice. High-frequency noise can be coupled from IC packages to an electrically conductive heatsink or heatspreader attached to the IC, which then is radiated, or the energy coupled to an enclosure cavity mode. This EMI coupling path was modeled with the finite-difference time-domain (FDTD) method, and a mitigation approach was investigated. Good agreement between measurements and FDTD modeling is demonstrated, indicating FDTD is a suitable tool for analysis and design. Then, several grounding schemes suitable for a heatsink or heatspreader …
Investigation Of Pcb Layout Parasitics In Emi Filtering Of I/O Lines, Xiaoning Ye, Geping Liu, James L. Drewniak
Investigation Of Pcb Layout Parasitics In Emi Filtering Of I/O Lines, Xiaoning Ye, Geping Liu, James L. Drewniak
Electrical and Computer Engineering Faculty Research & Creative Works
EMI filters are often utilized on I/O lines to reduce high-frequency noise from being conducted or coupled off the PCB and resulting in an EMI problem. However, layout parasitics are usually inevitable in practical circuit design, and the filtering performance may vary. In this study, the impact of the board layout on the filtering performance is investigated by |S21| measurements of sample PCB boards with different filter layouts. The finite-difference time-domain method is applied to model the boards, support the experimental work, and can be used to provide a means for conducting "what-if" engineering studies.
Emi Considerations In Selecting Heat-Sink-Thermal-Gasket Materials, Yu Huang, J. E. Butler, M. De Sorgo, Richard E. Dubroff, Todd H. Hubing, James L. Drewniak, Thomas Van Doren
Emi Considerations In Selecting Heat-Sink-Thermal-Gasket Materials, Yu Huang, J. E. Butler, M. De Sorgo, Richard E. Dubroff, Todd H. Hubing, James L. Drewniak, Thomas Van Doren
Electrical and Computer Engineering Faculty Research & Creative Works
Specific design criteria are proposed to mitigate radiated emissions from a resonant enclosure excited by a heat sink acting as a microstrip patch antenna source. In this particular application, the EMI mechanism is assumed to be due to coupling from the dominant TMz010 mode to one or more resonant modes associated with the enclosure dimensions. The enclosure is then presumed to radiate, at the enclosure resonance frequencies, through one or more apertures, slots, or seams. The EMI-reduction strategy consists of shifting the resonant frequency of the dominant-patch antenna mode by dielectrically loading the patch antenna with thermal-gasket material …
Mitigating Power Bus Noise With Embedded Capacitance In Pcb Designs, Minjia Xu, Todd H. Hubing, Juan Chen, James L. Drewniak, Thomas Van Doren, Richard E. Dubroff
Mitigating Power Bus Noise With Embedded Capacitance In Pcb Designs, Minjia Xu, Todd H. Hubing, Juan Chen, James L. Drewniak, Thomas Van Doren, Richard E. Dubroff
Electrical and Computer Engineering Faculty Research & Creative Works
This paper investigates the power bus noise and power bus impedance of printed circuit boards with four different kinds of embedded capacitance. These boards have power-ground plane pairs separated by a very thin layer of material with high dielectric permittivity. It is shown that embedded capacitance effectively reduces power bus noise over the entire frequency range evaluated (up to 5 GHz).
Applying The Method Of Moments And The Partial Element Equivalent Circuit Modeling Techniques To A Special Challenge Problem Of A Pc Board With Long Wires Attached, Yun Ji, Bruce Archambeault, Todd H. Hubing
Applying The Method Of Moments And The Partial Element Equivalent Circuit Modeling Techniques To A Special Challenge Problem Of A Pc Board With Long Wires Attached, Yun Ji, Bruce Archambeault, Todd H. Hubing
Electrical and Computer Engineering Faculty Research & Creative Works
This paper investigates a canonical printed circuit board (PCB) problem using both a method of moments (MoM) and a partial element equivalent circuit (PEEC) modeling technique. The problem consists of a PCB populated with three traces. One trace is a signal line and the other two are I/O lines that couple to the signal line and extend beyond the boundary of the board. Although the MoM code was a frequency domain code and the PEEC code was a time-domain code, good agreement was achieved in both the time-domain and the frequency-domain
Estimation Of Printed Circuit Board Power Bus Noise At Resonance Using A Simple Transmission Line Model, H. Hu, Todd H. Hubing, Thomas Van Doren
Estimation Of Printed Circuit Board Power Bus Noise At Resonance Using A Simple Transmission Line Model, H. Hu, Todd H. Hubing, Thomas Van Doren
Electrical and Computer Engineering Faculty Research & Creative Works
The maximum coupling between printed circuit board components connected to the same power-ground plane pair often occurs at or near power bus resonances. Theoretically, the transfer coefficient, S 21 , between two locations on the power bus can be as high as 0dB (i.e. perfect coupling) near resonant frequencies. However, in practice the coupling is usually much less due to losses in the power bus structure. Determining exactly what the maximum coupling will be in a lossy power bus structure requires a numerical model or measurement. However, an estimation of the maximum coupling can be obtained by drawing an analogy …
20-H Rule Modeling And Measurements, Todd H. Hubing, Hwan-Woo Shim
20-H Rule Modeling And Measurements, Todd H. Hubing, Hwan-Woo Shim
Electrical and Computer Engineering Faculty Research & Creative Works
The 20-H rule is a printed circuit board layout guideline. On boards with power and ground planes, the fringing field at the edges of the board is contained by backing the edge of the power plane away from the edge of the board by a distance equal to 20 times the separation distance between the planes. In this study, test boards were built and measured with and without implementing the 20-H rule. The measured results are compared to numerical models. The results of this study show that, although the near fields are more contained, the radiation from a board implementing …