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Method For Testing Field Programmable Gate Arrays, Charles E. Stroud, Miron Abramovici
Method For Testing Field Programmable Gate Arrays, Charles E. Stroud, Miron Abramovici
Electrical and Computer Engineering Faculty Patents
A method of testing field programmable gate arrays (FPGAs) includes the step of configuring programmable logic blocks of the FPGAs for completing a built-in self-test. This is followed by the steps of initiating the built-in self-test, generating test patterns with the programmable logic blocks and analyzing a resulting response to produce a pass/fail indication with the programmable logic blocks. More specifically, the configuring step includes establishing a first group of programmable logic blocks as test pattern generators and output response analyzers and a second group of programmable logic blocks as blocks under test. The blocks under test are then repeatedly …
Method For Testing Field Programmable Gate Arrays, Charles E. Stroud, Miron Abramovici
Method For Testing Field Programmable Gate Arrays, Charles E. Stroud, Miron Abramovici
Electrical and Computer Engineering Faculty Patents
A method of testing field programmable gate arrays (FPGAs) includes the step of configuring programmable logic blocks of the FPGAs for completing a built-in self-test. Specifically, the FPGA under test may be configured to act as an iterative logic array wherein a first group of programmable logic blocks are configured as test pattern generators, output response analyzers and helper cells, and a second group of programmable logic blocks are configured as blocks under test. The blocks under test are then repeatedly reconfigured in order to completely test each block under test in all possible modes of operation. The first and …