Open Access. Powered by Scholars. Published by Universities.®

Engineering Commons

Open Access. Powered by Scholars. Published by Universities.®

Theses/Dissertations

2018

Digital Circuits

Institution
Keyword
Publication

Articles 1 - 20 of 20

Full-Text Articles in Engineering

An Rs-485 Transceiver In A Silicon Carbide Cmos Process, Maria Raquel Benavides Herrera Dec 2018

An Rs-485 Transceiver In A Silicon Carbide Cmos Process, Maria Raquel Benavides Herrera

Graduate Theses and Dissertations

This thesis presents the design, simulation and test results of a silicon carbide (SiC) RS-485 transceiver for high temperature applications. This circuit is a building block in the design and fabrication of a digital data processing and control system. Automation processes for extreme environments, remote connection to high temperature locations, deep earth drilling, and high temperature data acquisition are some of the potential applications for such a system. The transceiver was designed and developed in a 1.2 µm SiC-CMOS process by Raytheon Systems, Ltd. (UK). It has been tested with a supply voltage of 12 V and 15 V, temperatures …


Investigating The Effect Of Detecting And Mitigating A Ring Oscillator-Based Hardware Trojan, Lakshmi Ramakrishnan Oct 2018

Investigating The Effect Of Detecting And Mitigating A Ring Oscillator-Based Hardware Trojan, Lakshmi Ramakrishnan

Electrical Engineering Theses and Dissertations

The outsourcing of the manufacturing process of integrated circuits to fabrications plants all over the world has exposed these chips to several security threats, especially at the hardware level. There have been instances of malicious circuitry, such as backdoors, being added to circuits without the knowledge of the chip designers or vendors. Such threats could be immensely powerful and dangerous against confidentiality, among other vulnerabilities.

Defense mechanisms against such attacks have been probed and defense techniques have been developed. But with the passage of time, attack techniques have improved immensely as well. From directly observing the inputs or outputs, adversaries …


An Iot System For Converting Handwritten Text To Editable Format Via Gesture Recognition, Nidhi Patel Aug 2018

An Iot System For Converting Handwritten Text To Editable Format Via Gesture Recognition, Nidhi Patel

Master of Science in Computer Science Theses

Evaluation of traditional classroom has led to electronic classroom i.e. e-learning. Growth of traditional classroom doesn’t stop at e-learning or distance learning. Next step to electronic classroom is a smart classroom. Most popular features of electronic classroom is capturing video/photos of lecture content and extracting handwriting for note-taking. Numerous techniques have been implemented in order to extract handwriting from video/photo of the lecture but still the deficiency of few techniques can be resolved, and which can turn electronic classroom into smart classroom.

In this thesis, we present a real-time IoT system to convert handwritten text into editable format by implementing …


Efficacy Of Multi-Threshold Null Convention Logic In Low-Power Applications, Brent Bell Aug 2018

Efficacy Of Multi-Threshold Null Convention Logic In Low-Power Applications, Brent Bell

Graduate Theses and Dissertations

In order for an asynchronous design paradigm such as Multi-Threshold NULL Convention Logic (MTNCL) to be adopted by industry, it is important for circuit designers to be aware of its advantages and drawbacks especially with respect to power usage. The power tradeoff between MTNCL and synchronous designs depends on many different factors including design type, circuit size, process node, and pipeline granularity. Each of these design dimensions influences the active power and the leakage power comparisons. This dissertation analyzes the effects of different design dimensions on power consumption and the associated rational for these effects. Results show that while MTNCL …


Skybridge-3d-Cmos: A Fine-Grained Vertical 3d-Cmos Technology Paving New Direction For 3d Ic, Jiajun Shi Jul 2018

Skybridge-3d-Cmos: A Fine-Grained Vertical 3d-Cmos Technology Paving New Direction For 3d Ic, Jiajun Shi

Doctoral Dissertations

2D CMOS integrated circuit (IC) technology scaling faces severe challenges that result from device scaling limitations, interconnect bottleneck that dominates power and performance, etc. 3D ICs with die-die and layer-layer stacking using Through Silicon Vias (TSVs) and Monolithic Inter-layer Vias (MIVs) have been explored in recent years to generate circuits with considerable interconnect saving for continuing technology scaling. However, these 3D IC technologies still rely on conventional 2D CMOS’s device, circuit and interconnect mindset showing only incremental benefits while adding new challenges reliability issues, robustness of power delivery network design and short-channel effects as technology node scaling. Skybridge-3D-CMOS (S3DC) is …


Genetic Algorithm Amplifier Biasing System (Gaabs): Genetic Algorithm For Biasing On Differential Analog Amplifiers, Sean Whalen Jun 2018

Genetic Algorithm Amplifier Biasing System (Gaabs): Genetic Algorithm For Biasing On Differential Analog Amplifiers, Sean Whalen

Computer Engineering

Genetic Algorithm Amplifier Biasing System (GAABS) - Senior Project Analysis

Summary of Functional Requirements

This project integrates LTSpice with a python script that runs a genetic algorithm to bias a differential amplifier. The system biases the amplifier with 2 different voltages, the base voltage for the PNP BJTs of the active loads and a voltage controlling the current of the current sink. The project runs via a python script, gets data from LTSpice’s command line call, and iteratively runs until the system is biased to achieve the greatest gain on an arbitrary input voltage.

Primary Constraints

Some of the main …


Modular Injection System And Sampling Template (M.I.S.S.T) Design Report, Froylan M. Aguirre Jun 2018

Modular Injection System And Sampling Template (M.I.S.S.T) Design Report, Froylan M. Aguirre

Computer Engineering

Digital systems are ubiquitous throughout modern life and their applications continue to grow. Thus system designers engineer and test modular systems to mitigate error rates. Smaller systems and their increasing importance in many applications demand the utmost reliability. Fault injection is the most common method used by researchers and engineers to test system reliability. However, most hardware fault injection implementations are ad hoc and only used to test a specific system or for specific tests. There is also software-implemented fault injection that adds overhead in the benchmark source code. The aim of this project is to develop a general use, …


Bicycle Power Meter, Andrew Mcguan Jun 2018

Bicycle Power Meter, Andrew Mcguan

Computer Engineering

A power meter is a cycling training tool used to record the power a rider is outputting. This is very useful to athletes who regularly do bike workouts, because the power output is a consistent measure of the rider’s effort level, and is not affected by outside factors such as wind or road gradient. If a cyclist does a workout with the intent to carry a certain speed for a certain amount of time, a strong headwind will slow them down and make them work harder to maintain the same speed, defeating the goal of the workout. When a power …


Arm Mke1xf Mcu Replatform, Nathan Hong, Derek Lung, Japsimran Singh, Bevin Tang Jun 2018

Arm Mke1xf Mcu Replatform, Nathan Hong, Derek Lung, Japsimran Singh, Bevin Tang

Computer Engineering

After Cal Poly Racing’s electrical team began to hit the technical limits of the ADC and other I/O features of the current 8-bit Atmel AT90 microcontroller unit, it became clear that an upgrade was due. This replatforming project takes the functionalities of the old, 8-bit architecture, and aims to provide a 32-bit version using the ARM MKE1xF MCU. With the idea of having a working PCB as a stretch goal, the scope of the library development was limited to enable base functionality. Thus, the only libraries developed were for the Timer, ADC, SPI, UART, and CAN. Additionally, this document discusses …


Analog Sorting Using Pulse Width Modulation, Riley C. Olson Jun 2018

Analog Sorting Using Pulse Width Modulation, Riley C. Olson

Computer Engineering

As time goes on, computers become more and more powerful. However, as processing time becomes less of a limiting factor for computing tasks, power consumption takes its place for many tasks. This paper proposes and tests a new method for sorting analog signals. This new sorting method converts analog signals into Pulse Width Modulated(PWM) signals of varying duty cycle , which are then sorted by a simple network of combinational logic, and then converted to a normal binary representation. In order to implement this new method, multiple circuits had to be designed and and tested to ensure their functionality and …


A Basic, Four Logic Cluster, Disjoint Switch Connected Fpga Architecture, Joseph Prachar Jun 2018

A Basic, Four Logic Cluster, Disjoint Switch Connected Fpga Architecture, Joseph Prachar

Computer Engineering

This paper seeks to describe the process of developing a new FPGA architecture from nothing, both in terms of knowledge about FPGAs and in initial design material. Specifically, this project set out to design an FPGA architecture which can implement a simple state machine type design with 10 inputs, 10 outputs and 10 states. The open source Verilog-to-Routing FPGA CAD flow tool was used in order to synthesize, place, and route HDL files onto the architecture. This project was completed in terms of the spirit of the original goals of implementing an FPGA from scratch. Although, the project resulted in …


Roborodentia Robot: Treadbot, Stephen C. Schmidt Jun 2018

Roborodentia Robot: Treadbot, Stephen C. Schmidt

Computer Science and Software Engineering

This document is a summary of my contest entry to the 2018 Cal Poly Roborodentia competition. It is meant to be a process overview and design outline of the mechanical, electrical, and software components of my robot.


How Gpu Rendering Affects Image Processing And Scientific Calculation Speed, Power And Energy On A Raspberry Pi, Qihao He May 2018

How Gpu Rendering Affects Image Processing And Scientific Calculation Speed, Power And Energy On A Raspberry Pi, Qihao He

Electronic Theses and Dissertations

In this thesis, we explore the speed, power, and energy performance of the same data process on the central processing unit (CPU) with and without the acceleration of the Graphics Processing Unit (GPU) on the microcomputer Raspberry Pi (RPI). We tested on the RPI in two different fields. The first was comparing the speed, power, and energy usage with and without GPU acceleration in the image processing impacts on RPI model B+. The second was comparing speed, power, energy usage, and accuracy for scientific calculation with and without GPU acceleration on RPI model B+ and 3B.

We used a novel …


Improving System-On-Chip Test Networks For: Bandwidth, Security, And Power, Saurabh Gupta May 2018

Improving System-On-Chip Test Networks For: Bandwidth, Security, And Power, Saurabh Gupta

Computer Science and Engineering Theses and Dissertations

Modern System-on-Chips (SoCs) provide benefits such as reduction in overall system cost, and size, increased performance, and lower power consumption. Increasing complexity of these Integrated Circuits (ICs) has resulted in a higher probability of manufacturing defects. Manufacturing defects can result in the faulty operation of a system. Thus, it is essential to test an IC after it is manufactured to detect any possible faults in it. These SoCs include on-chip embedded instruments that can be used for test, debug, diagnosis, validation, monitoring, characterization, configuration, or functional purposes. IEEE 1687 Std. (IJTAG) provides a standard interface for the reconfigurable access and …


Comparison Of Data Transfer Alternatives In Asynchronous Circuits, Mark Howard May 2018

Comparison Of Data Transfer Alternatives In Asynchronous Circuits, Mark Howard

Computer Science and Computer Engineering Undergraduate Honors Theses

Digital integrated circuits (ICs) have become progressively complex in their functionality. This has sped up the demand for asynchronous architectures, which operate without any clocking scheme, considering new challenges in the timing of synchronous systems. Asynchronous ICs have less stringent environmental constraints and are capable of maintaining reliable operation in extreme environments, while also enjoying potential benefits such as low power consumption, high modularity, and improved performance. However, when the traditional bus architecture of synchronous systems is applied to asynchronous designs, handshaking protocols required for asynchronous circuit operation result in significantly increased power consumption, offsetting the low power benefit of …


Asynchronous Circuit Stacking For Simplified Power Management, Andrew Lloyd Suchanek May 2018

Asynchronous Circuit Stacking For Simplified Power Management, Andrew Lloyd Suchanek

Graduate Theses and Dissertations

As digital integrated circuits (ICs) continue to increase in complexity, new challenges arise for designers. Complex ICs are often designed by incorporating multiple power domains therefore requiring multiple voltage converters to produce the corresponding supply voltages. These converters not only take substantial on-chip layout area and/or off-chip space, but also aggregate the power loss during the voltage conversions that must occur fast enough to maintain the necessary power supplies. This dissertation work presents an asynchronous Multi-Threshold NULL Convention Logic (MTNCL) “stacked” circuit architecture that alleviates this problem by reducing the number of voltage converters needed to supply the voltage the …


From Digital Traces To Marketing Insights: Recovering Consumer Preferences For Digital Entertainment Services And Online Shopping, Ai Phuong Hoang May 2018

From Digital Traces To Marketing Insights: Recovering Consumer Preferences For Digital Entertainment Services And Online Shopping, Ai Phuong Hoang

Dissertations and Theses Collection (Open Access)

IT innovations disrupt traditional business models and challenge conventional thinking. Thus, industry incumbents face fierce competition from start-ups with new business models and new ways of engaging customers. Digital entertainment goods and personalized services have become a lucrative market, which has undergone a transformation enabled by seamless Internet connections. Meanwhile, social networks and other online platforms have brought people and business even closer.


Automatic Testing In The United States Air Force, Pearson Wade May 2018

Automatic Testing In The United States Air Force, Pearson Wade

Computer Science and Computer Engineering Undergraduate Honors Theses

The need for standardized Automatic Testing Equipment in the United States Department of Defense has brought about new policies and procedures within entities like the United States Air Force. The diversity and lifespan of systems such as jets, missiles, drones, and other electronics have brought on the need for a new system known as the Versatile Depot Automatic Test Station, or VDATS. The VDATS handles the automatic testing of replaceable digital circuits from different systems. I was introduced to this system firsthand during my time as an intern at Tinker AFB, Oklahoma. This new standardized approach to testing a diverse …


Silicon Compilation And Test For Dataflow Implementations In Gasp And Click, Swetha Mettala Gilla Jan 2018

Silicon Compilation And Test For Dataflow Implementations In Gasp And Click, Swetha Mettala Gilla

Dissertations and Theses

Many modern computer systems are distributed over space. Well-known examples are the Internet of Things and IBM's TrueNorth for deep learning applications. At the Asynchronous Research Center (ARC) at Portland State University we build distributed hardware systems using self-timed computation and delay-insensitive communication. Where appropriate, self-timed hardware operations can reduce average and peak power, energy, latency, and electromagnetic interference. Alternatively, self-timed operations can increase throughput, tolerance to delay variations, scalability, and manufacturability.

The design of complex hardware systems requires design automation and support for test, debug, and product characterization.

This thesis focuses on design compilation and test support for dataflow …


Toward Biologically-Inspired Self-Healing, Resilient Architectures For Digital Instrumentation And Control Systems And Embedded Devices, Shawkat Sabah Khairullah Jan 2018

Toward Biologically-Inspired Self-Healing, Resilient Architectures For Digital Instrumentation And Control Systems And Embedded Devices, Shawkat Sabah Khairullah

Theses and Dissertations

Digital Instrumentation and Control (I&C) systems in safety-related applications of next generation industrial automation systems require high levels of resilience against different fault classes. One of the more essential concepts for achieving this goal is the notion of resilient and survivable digital I&C systems. In recent years, self-healing concepts based on biological physiology have received attention for the design of robust digital systems. However, many of these approaches have not been architected from the outset with safety in mind, nor have they been targeted for the automation community where a significant need exists. This dissertation presents a new self-healing digital …