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Dividing And Conquering Meshes Within The Nist Fire Dynamics Simulator (Fds) On Multicore Computing Systems, Donald Charles Collins
Dividing And Conquering Meshes Within The Nist Fire Dynamics Simulator (Fds) On Multicore Computing Systems, Donald Charles Collins
Masters Theses
The National Institute for Standards and Technology (NIST) Fire Dynamics Simulator (FDS) provides a computational fluid dynamics model of a fire, which can be visualized by using NIST Smokeview (SMV). Users must create a configuration file (*.fds) that describes the environment and other characteristics of the fire scene so that the FDS software can produce the output file (*.smv) needed for visualization.The processing can be computationally intensive, often taking between several minutes and several hours to complete. In many cases, a user will create a file that is not optimized for a multicore computing system. By dividing meshes within the …
Danna A Neuromorphic Computing Vlsi Chip, Christopher Paul Daffron
Danna A Neuromorphic Computing Vlsi Chip, Christopher Paul Daffron
Masters Theses
Dynamic Adaptive Neural Network Arrays (DANNAs) are neuromorphic systems that exhibit spiking behaviors and can be designed using evolutionary optimization. Array elements are rapidly reconfigurable and can function as either neurons or synapses with programmable interconnections and parameters. Currently, DANNAs are implemented using a Field Programmable Gate Array (FPGA) and are constrained by this technology. To alleviate these constraints and introduce new and improved features, a semi-custom Very Large Scale Integration (VLSI) implementation has been created. This implementation improves upon the FPGA implementation in three key areas. The density of the array is improved, with 5,625 elements on a single …
Ultra-Low-Power Configurable Analog Signal Processor For Wireless Sensors, James Kelly Griffin
Ultra-Low-Power Configurable Analog Signal Processor For Wireless Sensors, James Kelly Griffin
Masters Theses
The demand for on-chip low-power Complementary Metal Oxide Semiconductor (CMOS) analog signal processing has significantly increased in recent years. Digital signal processors continue to shrink in size as transistors half in size every two years. However, digital signal processors (DSP's) notoriously use more power than analog signal processors (APS's). This thesis presents a configurable analog signal processor (CASP) used for wireless sensors. This CASP contains a multitude of processing blocks include the following: low pass filter (LPF), high pass filter (HPF) integrator, differentiator, operational transconductance amplifier (OTA), rectifier with absolute value functionality, and multiplier. Each block uses current-mode processing and …