Engineering Commons^™

Energy Efficiency Of Computation In All-Spin Logic: Projections And Fundamental Limits, Zongya Chen

Masters Theses

Built with nanomagnets, a spintronic device called the all-spin logic (ASL) device carries information with only spin currents, resulting in a low power supply--10 mV. This voltage is 100 times smaller than the conventional CMOS devices (usually 0.8~1V). The potential for improved energy efficiency made possible by the low operating voltage of ASL makes it one of the most promising devices among its post-CMOS competitors.

The basic working principles of ASL device are introduced in this thesis and two complementary approaches to studying energy efficiency of computation are applied to a common set of ASL circuits: (1) a circuit simulation …

Integrated Solar Technologies With Outdoor Pedestrian Bridge Superstructure Decking, Richard K. Racz

Masters Theses

Solar technology has been a major topic in sustainable design for many years. In the last five years, however, the solar technology industry has seen a rapid growth in installations and technological advances in cell design. Combined with a rapidly declining overall system cost, the idea of introducing solar technology into a wider range of applications is becoming a focus for engineers and scientists around the world. So many variables which alter solar energy production, such as the sun and surrounding environment, determine whether a solar design is beneficial. This thesis presents a bridge deck surface integrated with solar cells …

Energy Agile Cluster Communication, Muhammad Zain Mustafa

Masters Theses

Computing researchers have long focused on improving energy-efficiency?the amount of computation per joule? under the implicit assumption that all energy is created equal. Energy however is not created equal: its cost and carbon footprint fluctuates over time due to a variety of factors. These fluctuations are expected to in- tensify as renewable penetration increases. Thus in my work I introduce energy-agility a design concept for a platform?s ability to rapidly and efficiently adapt to such power fluctuations. I then introduce a representative application to assess energy-agility for the type of long-running, parallel, data-intensive tasks that are both common in data …

Effect Of Clock And Power Gating On Power Distribution Network Noise In 2d And 3d Integrated Circuits, Vinay C. Patil

Masters Theses

In this work, power supply noise contribution, at a particular node on the power grid, from clock/power gated blocks is maximized at particular time and the synthetic gating patterns of the blocks that result in the maximum noise is obtained for the interval 0 to target time. We utilize wavelet based analysis as wavelets are a natural way of characterizing the time-frequency behavior of the power grid. The gating patterns for the blocks and the maximum supply noise at the Point of Interest at the specified target time obtained via a Linear Programming (LP) formulation (clock gating) and Genetic Algorithm …

Design And Evaluation Of An L-Band Current-Mode Class-D Power Amplifier Integrated Circuit, Michael J. Shusta

Masters Theses

Power amplifiers (PAs) convert energy from DC to high frequencies in all radio and microwave transmitter systems be they wireless base stations, handsets, radars, heaters, and so on. PAs are the dominant consumers of energy in these systems and, therefore, the dominant sources of system cost and inefficiency. Research has focused on efficient solid-state PA circuit topologies and their optimization since the 1960s. The 2000s saw the current-mode class-D (CMCD) topology, potentially suitable for today's wireless communications systems, show promise in the UHF frequency band. This thesis describes the design and testing of a high-efficiency CMCD amplifier with an integrated …