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2007

7T SRAM

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Stability And Static Noise Margin Analysis Of Static Random Access Memory, Rajasekhar Keerthi Jan 2007

Stability And Static Noise Margin Analysis Of Static Random Access Memory, Rajasekhar Keerthi

Browse all Theses and Dissertations

The transistor mismatch can be described as two closely placed identical transistors have important differences in their electrical parameters as threshold voltage, body factor and current factor and make integrated circuit design and fabrication less predictable and controllable. Stability of a static random access memory (SRAM) is defined through its ability to retain the data at low-VDD. It is seriously affected by increased variability of transistor mismatch and decreased supply voltage and therefore becomes a major limitation of overall performance of low-voltage SRAM in nanometer CMOS process. The stability limitation is addressed through the design of a seven-transistor (7T) SRAM …