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Missouri University of Science and Technology
<p>Asynchronous circuits -- Design<br />Field programmable gate arrays -- Design<br />Logic design</p>
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Design And Implementation Of An Asynchronous Null Convention Logic (Ncl) Fpga, Indira Priyadarshini Dugganapally
Design And Implementation Of An Asynchronous Null Convention Logic (Ncl) Fpga, Indira Priyadarshini Dugganapally
Masters Theses
"This Master’s thesis outlines the design of a completely asynchronous Field Programmable Gate Array (FPGA) for implementing NULL Convention Logic (NCL) digital circuits. The proposed design uses four Configurable Logic Blocks (CLB), each of which in turn is designed using four Logic Elements (LE) to implement NCL logic function. Each LE can be configured to function as any one of the 27 fundamental NCL gates. A Logic Element is designed by concatenating a Look-Up-Table (LUT) with a pull-up pull-down transistor chain and a hysteresis loop. The interconnections and the switch box are designed using pass transistors and SRAM. In this …