Open Access. Powered by Scholars. Published by Universities.®
California Polytechnic State University, San Luis Obispo
Articles 1 - 1 of 1
Full-Text Articles in Engineering
Sram Compiler For Automated Memory Layout Supporting Multiple Transistor Process Technologies, Brandon Hilgers
Sram Compiler For Automated Memory Layout Supporting Multiple Transistor Process Technologies, Brandon Hilgers
Master's Theses
This research details the design of an SRAM compiler for quickly creating SRAM blocks for Cal Poly integrated circuit (IC) designs. The compiler generates memory for two process technologies (IBM 180nm cmrf7sf and ON Semiconductor 600nm SCMOS) and requires a minimum number of specifications from the user for ease of use, while still offering the option to customize the performance for speed or area of the generated SRAM cell. By automatically creating SRAM arrays, the compiler saves the user time from having to layout and test memory and allows for quick updates and changes to a design. Memory compilers with …