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Full-Text Articles in Engineering

Dynamic Target Classification In Wireless Sensor Networks, Ying Sun Aug 2008

Dynamic Target Classification In Wireless Sensor Networks, Ying Sun

Masters Theses

Information exploitation schemes with high-accuracy and low computational cost play an important role in Wireless Sensor Networks (WSNs). This thesis studies the problem of target classification in WSNs. Specifically, due to the resource constraints and dynamic nature of WSNs, we focus on the design of the energy-efficient solutionwith high accuracy for target classification in WSNs.

Feature extraction and classification are two intertwined components in pattern recognition. Our hypothesis is that for each type of target, there exists an optimal set of features in conjunction with a specific classifier, which can yield the best performance in terms of classification accuracy using …


Extending Hardware Based Mandatory Access Controls To Multicore Architectures, Brian Lewis Sharp Aug 2008

Extending Hardware Based Mandatory Access Controls To Multicore Architectures, Brian Lewis Sharp

Masters Theses

Memory based vulnerabilities have plagued the computer industry since the release of the Morris worm twenty years ago. In addition to buffer overflow attacks like the Morris worm, format strings, ret-libC, and heap double free() viruses have been able to take advantage of pervasive programming errors. A recent example is the unspecified buffer overflow vulnerability present in Mozilla Firefox 3.0. From the past one can learn that these coding mistakes are not waning. A solution is needed that can close off these security shortcomings while still being of minimal impact to the user. Antivirus software makers continuously overestimate the lengths …


Asynchronous Nanowire Crossbar Architecture For Manufacturability, Modularity And Robustness, Ravi Bonam Jan 2008

Asynchronous Nanowire Crossbar Architecture For Manufacturability, Modularity And Robustness, Ravi Bonam

Masters Theses

"This thesis spotlights the dawn of a promising new nanowire crossbar architecture, the Asynchronous crossbar architecture, in the form of three different articles. It combines the reduced size of the nanowire crossbar architecture with the clock-free nature of Null Conventional Logic, which are the primary advantages. The first paper explains the proposed architecture with illustrations, including the design of an optimized full adder. This architecture has an elementary structure termed as a Programmable Gate Macro Block (PGMB) which is analogous to a threshold gate in NCL. The other two papers concentrate on mapping and placement techniques which are important due …


Development And Validation Of A Microcontroller Emissions Model, Shaohua Li Jan 2008

Development And Validation Of A Microcontroller Emissions Model, Shaohua Li

Masters Theses

"A model of the power delivery network of a microcontroller was developed to predict the radiated and conducted emissions from the integrated circuit (IC). A SPICE model of the power delivery network, similar to the ICEM model, was developed for a microcontroller running a typical program and used to predict the noise voltage between the power and return planes of a printed circuit board (PCB).


An Approach For Human Swarm Interaction, Shishir Bashyal Jan 2008

An Approach For Human Swarm Interaction, Shishir Bashyal

Masters Theses

"This study shows that appropriate human interaction can benefit a swarm of robots to reach to goal more efficiently. The common belief in swarm robotics that user intervention adversely affects intelligence of the swarm is studied carefully to show that the traditional human-robot interaction approaches are not suitable for human swarm interaction. A set of desirable features for human swarm interaction is identified and an interaction architecture is proposed that has all of the desirable features. A swarm simulation environment is then created that allows simulating a swarm behavior in an indoor environment. Three different applications of the swarm are …


Probabilistic Analysis Of Defect Tolerance In Asynchronous Nano Crossbar Architecture, Shikha Chaudhary Jan 2008

Probabilistic Analysis Of Defect Tolerance In Asynchronous Nano Crossbar Architecture, Shikha Chaudhary

Masters Theses

"Among recent advancements in technology, nanotechnology is particularly promising. Most researchers have begun to focus their efforts on developing nano scale circuits. Nano scale devices such as carbon nano tubes (CNT) and silicon nano wires (SiNW) form the primitive building blocks of many nano scale logic devices and recently developed computing architecture. One of the most promising nanotechnologies is crossbar-based architecture, a two-dimensional nanoarray, formed by the intersection of two orthogonal sets of parallel and uniformly-spaced CNTs or SiNWs. Nanowire crossbars offer the potential for ultra-high density, which has never been achieved by photolithography. In an effort to improve these …


Defect-Tolerance And Testing For Configurable Nano-Crossbars, Mandar V. Joshi Jan 2008

Defect-Tolerance And Testing For Configurable Nano-Crossbars, Mandar V. Joshi

Masters Theses

"Moore's Law speculated a trend in computation technology in terms of number of transistors per unit area that would double roughly every two years. Even after 40 years of this prediction, current technologies have been following it successfully. There are however, certain physical limitations of current CMOS that would result in fundamental obstructions to continuation of Moore's Law. Although there is a debate amongst experts on how much time it would take for this to happen, it is certain that some entirely new paradigms for semiconductor electronics would be needed to replace CMOS and to delay the end of Moore's …