Engineering Commons^™

Self-Assembly Of Microstructures, Paul E. Kladitis

Theses and Dissertations

Four areas are investigated in this research: erecting microstructures normal to the substrate plane without direct human intervention (self-assembled), providing low resistance electrical connections to the erected microstructure, realizing circular motion normal to the substrate plane, and implementing a micro-robot. The designs in this research concentrate on erecting and providing power to a leg designed for use with the micro-robot. The leg and the attached low resistance electrical connectors were not self-assembled because the accompanying actuators were not powerful enough. However, the novel connectors provide the most practical, versatile, and lowest possible resistance connections for the MUMPs fabrication process. The …

A Comparative Analysis Of Networks Of Workstations And Massively Parallel Processors For Signal Processing, David C. Gindhart

Theses and Dissertations

The traditional approach to parallel processing has been to use Massively Parallel Processors (MPPs). An alternative design is commercial-off-the-shelf (COTS) workstations connected to high-speed networks. These networks of workstations (NOWs) typically have faster processors, heterogeneous environments, and most importantly, offer a lower per node cost. This thesis compares the performance of MPPs and NOWs for the two-dimensional fast Fourier transform (2-D FFT). Three original, high-performance, portable 2-D FFTs have been implemented: the vector-radix, row-column and pipeline. The performance of these algorithms was measured on the Intel Paragon, IBM SP2 and the AFIT NOW, which consists of 6 Sun Ultra workstations …

A Reconfigurable Superscalar Architecture, Christopher B. Mayer

Theses and Dissertations

The invention of the Field Programmable Gate Array (FPGA) has led to a number of interesting developments. One is the idea of providing custom hardware support for applications running on a computer. These reconfigurable computers have been shown to decrease the execution time for some applications. Based on past results, attention has subsequently turned to using reconfigurable computing in general-purpose computers (e.g. desktop and workstation environments). This thesis develops a design for just such a computer. The design, FPGADLX, is based on a hypothetical superscalar computer running the DLX instruction set and is generic enough in principle to be adapted …

Message-Bundle Converting In Intenet Protocol Multicast-Based High Level Architecture Exercises, Tracy A. Bobo

Theses and Dissertations

The Department of Defense is pushing for more wide-spread and realistic interactive training simulations which increases the demand on network capacity and resources. While network bandwidth is a measurable resource, packet bandwidth, or the number of packets-per-second (Pk/s) a host can handle, is a shifting commodity. This research analyzes host performance characteristics under varying data loads. The hosts include SGI single and multi-processor systems and Intel Pentium platforms using both Windows 95 and Linux Operating Systems. The networking media covers Ethernet, ATM and FDDI. For the ATM network, both AAL5 and IP over ATM were analyzed. With the data from …

Modeling And Simulation Support For Parallel Algorithms In A High-Speed Network, Dustin E. Yates

Theses and Dissertations

This thesis investigates the ability of a simulation model to compare and contrast parallel processing algorithms in a high-speed network. The model extends existing modeling, analysis, and comparison of parallel algorithms by providing graphics based components that facilitate the measurement of system resources. Simulation components are based on the Myrinet local area network standard. The models provide seven different topologies to contrast the performance of five variations of Fast Fourier Transform (FFT) algorithms. Furthermore, the models were implemented using a commercially developed product that facilitates the testing of additional topologies and the investigation of hardware variations. Accurate comparisons are statistically …

A Modeling And Simulation Approach To Characterize Network Layer Internet Survivability, Leif S. King

Theses and Dissertations

The Air Force Core Competency of Information Superiority will be achieved in an age of decreasing AF manpower and corporate expertise. Increased AF reliance on COTS solutions, coupled with nearly ubiquitous points of entry to communication networks, create unique challenges in maintaining the Information Superiority edge. The protection of the internet is part of this equation. The internet supports the daily business traffic of the Air Force. Personnel, finance, and supply data flow through its routers. Controlling an adversary's access to our information systems, either the data, or the hardware and software that control the data and transform it into …

A Mammographic Registration Method Based On Optical Flow And Multiresolution Computing, Kevin A. Lee

Theses and Dissertations

Mammography is a potent weapon in the fight against Breast Cancer, due in large part to its widespread availability and low cost. Despite the fact that mammography can detect small lesions as early as two years before they become palpable on physical exam, between 10 and 30 percent of cancerous lesions go undetected during evaluation by the radiologist. One approach to improving detection rates involves comparing mammograms of the same breast from successive years. Since most forms of breast cancer develop slowly, multiple view techniques might be able to detect subtle changes indicative of cancerous growth. This thesis proposes a …

Fpga Processor Implementation For The Forward Kinematics Of The Umdh, Steven M. Parmley

Theses and Dissertations

The focus of this research was on the implementation of a forward kinematic algorithm for the Utah MIT Dexterous Hand (UMDH). Specifically, the algorithm was synthesized from mathematical models onto a Field Programmable Gate Array (FPGA) processor. This approach is different from the classical, general purpose microprocessor design where all robotic controller functions including forward Kinematics are executed serially from a compiled programming language such as C. The compiled code and subsequent real time operating system must be stored on some form of nonvolatile memory, typically magnetic media such as a fixed or hard disk drive, along with other computer …

A Performance Analysis Of The Faugeras Color Space As A Component Of Color Histogram-Based Image Retrieval, Chad A. Vander Meer

Theses and Dissertations

The use of color histograms for image retrieval from databases has been implemented in many variations. Selecting the appropriate color space for similarity comparisons is an important part of a color histogram technique. This paper serves to introduce and evaluate the performance of a color space through the use of color histograms. Performance is evaluated by correlating the similarity results obtained from various color feature vector techniques (including color histgramming) to those gathered through a human perceptual test. The perceptual test required 36 human subjects to evaluate the similarity of 10 military aircraft images. The same 10 images were also …

High Performance Distributed Storage Architectures, Ahmed M Amer

Archived Theses and Dissertations

No abstract provided.

Single Row Routing: Theoretical And Experimental Performance Evaluation, And New Heuristic Development, David A. Hysom

Computer Science Theses & Dissertations

The Single Row Routing Problem (SRRP) is an abstraction arising from real-world multilayer routing concerns. While NP-Complete, development of efficient SRRP routing heuristics are of vital concern to VLSI design. Previously, researchers have introduced various heuristics for SRRP; however, a comprehensive examination of SRRP behavior has been lacking.

We are particularly concerned with the street-congestion minimization constraint, which is agreed to be the constraint of greatest interest to industry. Several theorems stating lower bounds on street congestion are known. We show that these bounds are not tight in general, and argue they may be in error by at least 50% …

A Crosstalk Correcting Router That Uses Online Noise Simulation To Route High Speed Multichip Modules, Kenneth J. Mcclellan Jr.

Theses and Dissertations

Existing MultiChip Module (MCM) auto-routers either ignore crosstalk or use over simplified crosstalk approximations. Of the routers that do consider crosstalk, very few have the capability to correct crosstalk problems after they occur. This dissertation describes a router that not only has an internal crosstalk model for high speed MCMs which is more accurate than that of other existing routers, but also has the capability to use an online simulator to more accurately determine noise levels. After crosstalk problems occur, the router has the ability to correct these problems. Through memory usage reductions and routing efficiency improvements, this maze router …

A Framework For An Automated Compilation System For Reconfigurable Architectures, George R. Roelke Iv

Theses and Dissertations

The advent of the Field Programmable Gate Array has allowed the implementation of runtime reconfigurable computer systems. These systems are capable of configuring their hardware to provide custom hardware support for software applications. Since these architectures can be reconfigured during operation, they are able to provide hardware support for a variety of applications, without removal from the system. The Air Force is currently investigating reconfigurable architectures for avionics and signal processing applications. This thesis investigates the problem of automating the application development process for reconfigurable architectures. The lack of automated development support is a major limiting factor in the use …

A Simplified Approach To Reduce Blocking And Ringing Artifacts In Transform-Coded Images, Jianping Hu

Dissertations and Theses

Presently Block-based Discrete Cosine Transform (BDCT) image coding techniques are widely used in image and video compression applications such as JPEG and MPEG. At a moderate bit rate, BDCT is usually a quite satisfactory solution to most of practical coding applications. However, for high rate compression it produces noticeable blocking and ringing artifacts in the decompressed image. It has been an active research area for a decade for reducing these artifacts. In this thesis, a novel post-processing algorithm is proposed to remove the blocking and ringing artifacts at low bit rate. It is non-iterative and uses both spatial and transform …

Design And Implemetation Of Internet Mail Servers With Embedded Data Compression, Alka Nand

Theses Digitization Project

No abstract provided.

Spider: An Overview Of An Object-Oriented Distributed Computing System, Han-Sheng Yuh

Theses Digitization Project

The Spider Project is an object-oriented distributed system which provides a testbed for researchers in the Department of Computer Science, CSUSB, to conduct research on distributed systems.

Design And Implementation Of High-Radix Arithmetic Systems Based On The Sdnr/Rns Data Representation, Paul Whyte

Theses : Honours

This project involved the design and implementation of high-radix arithmetic systems based on the hybrid SDNRIRNS data representation. Some real-time applications require a real-time arithmetic system. An SDNR/RNS arithmetic system provides parallel, real-time processing. The advantages and disadvantages of high-radix SDNR/RNS arithmetic, and the feasibility of implementing SDNR/RNS arithmetic systems in CMOS VLSI technology, were investigated in this project. A common methodological model, which included the stages of analysis, design, implementation, testing, and simulation, was followed. The combination of the SDNR and RNS transforms potential complex logic networks into simpler logic blocks. It was found that when constructing a SDNRIRNS …

A Design In Interfacing The Mc68hc11 To The Amd Am29f010 Flash Memory Chips, David H. Hands

Theses : Honours

In many environments, motion, vibration and contamination to the Secondary Storage Devices such as hard drives can cause data to become unreadable or even lost. Elimination of these types of magnetic drives, incorporating its replacement with a Solid State Memory Storage Device would provide an invaluable solution for these type of environments. If a secondary storage system could replace these electro-mechanical disk drive systems incorporating a Solid State Secondary Storage Device such as the Flash Memory Integrated Chips, an increase in the speed of reading from milli-seconds to nano-seconds would transpire as well as providing a robust Secondary Storage Device. …