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University of Kentucky Master's Theses

2009

Hardware Description Language

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Verification And Debug Techniques For Integrated Circuit Designs, David Allen Crutchfield Jan 2009

Verification And Debug Techniques For Integrated Circuit Designs, David Allen Crutchfield

University of Kentucky Master's Theses

Verification and debug of integrated circuits for embedded applications has grown in importance as the complexity in function has increased dramatically over time. Various modeling and debugging techniques have been developed to overcome the overwhelming challenge. This thesis attempts to address verification and debug methods by presenting an accurate C model at the bit and algorithm level coupled with an implemented Hardware Description Language (HDL). Key concepts such as common signal and variable naming conventions are incorporated as well as a stepping function within the implemented HDL. Additionally, a common interface between low-level drivers and C models is presented for …