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Full-Text Articles in Engineering

Characterisation, Modelling And Performance Evaluation Of Cmos Integrated Rf-Mems Multielectrode Tunable Capacitor, Zbigniew Olszewski Jan 2005

Characterisation, Modelling And Performance Evaluation Of Cmos Integrated Rf-Mems Multielectrode Tunable Capacitor, Zbigniew Olszewski

Theses

The circuits used in telecommunications are made of two types of components; active integrated circuits that have continuously been improved together with the evolution of the Si technology and off-chip and on-chip passive components. The latter did not profit from much development and now constitute the bottleneck for further integration of RF (Radio Frequency) integrated circuits. MicroElectroMechanical Systems (MEMS) is rapidly emerging as an enabling technology to yield a new generation of high performance components to replace off-chip (not integrated) and on-chip (poor performance) counterparts. The RF components (RF-MEMS) that can be fabricated with MEMS technology are mainly the resonator, …


Design Of Low Phase Drift Cmos Frequency Synthesisers, Cyril Patrick Hervé Florent Lahuec Jan 2002

Design Of Low Phase Drift Cmos Frequency Synthesisers, Cyril Patrick Hervé Florent Lahuec

Theses

This thesis presents a methodology for the development of high performance video clock synthesisers that have high (2000) input to output clock multiplication ratios. The synthesisers are required to be compatible with standard CMOS technologies and they must exhibit very low drift between their input and output clocks.

The methodology used borrows techniques established for RF synthesisers in the GHz range. In the RF domain there are significant constraints on spectral spread and because of this there has been significant interest in phase noise generated by intrinsic device noise. Simple and accurate models were developed that help understand the up …


Flash Adc Using 2Μm Cmos P-Well Technology : Design And Test, Joseph E. Levinson Jan 1996

Flash Adc Using 2Μm Cmos P-Well Technology : Design And Test, Joseph E. Levinson

Theses

This thesis describes the design, implementation and test for a new CMOS analog-to-digital converter IC chip. In designing the analog-to-digital converter in this thesis a radically different comparator design that is only available with CMOS logic. The design utilizes a single CMOS inverter as an ultra-high gain amplifier. This approach reduces the circuit dependence upon matching of the transistors similar to the traditional method. This new design requires less area since the comparator utilizes fewer transistors.

Flash analog-to-digital converters use 2" - 1 comparators to do a single conversion where n is the number of bits used. These comparators are …


Three Dimensional Magnetic Field Sensors And Array In Bicmos Technology, Bingda Wang Jan 1993

Three Dimensional Magnetic Field Sensors And Array In Bicmos Technology, Bingda Wang

Theses

This thesis presents new designs of three dimensional magnetic field sensors in BiCMOS technology. The detailed design of the merged structure device by common diffusion and the high gain transduction circuit are presented. The merged structure has the advantage of less area, less external contacts and less parasitic capacitance. Cross-sensitivity is also eliminated by employing the merged structure. Three active on-chip loads are introduced to improve the sensitivity. The SPICE simulation results show that when a relative change in current ΔI/I is 0.001, about 13.6 mV and 8.5mV can be detected at the output in X(or Y) and Z directions, …


A Transistor Delay Model Based On Charge Conservation, Bharatsingh K. Bisen Dec 1990

A Transistor Delay Model Based On Charge Conservation, Bharatsingh K. Bisen

Theses

Delay information of a circuit is often used in the areas of timing verification, timing analysis, race detection and circuit optimization. Given a circuit its delay can be estimated by various simulation techniques. SPICE is one of the simulation techniques, but it is seen that with the increase in the complexity of the circuit the SPICE circuit simulation technique to obtain delay information become cumbersome and computationally too expensive. So as to overcome the above disadvantages of the circuit simulation technique to obtain delay information various timing delay models were developed. However general survey of most of these timing delay …


Investigation Of Different Cmos Dram Sense Amplifier Configurations In Vlsi, Bihju Chiu May 1988

Investigation Of Different Cmos Dram Sense Amplifier Configurations In Vlsi, Bihju Chiu

Theses

Sense amplifiers are particularly difficult circuits to design. In this work, only CMOS sense amplifiers are considered. There are typically two configurations of CMOS sense amplifiers: the cross-connected flip flop configuration and the current-mirror configuration. They are widely used nowadays with various modifications. These improved configurations are simulated and optimized with SPICE package, and their relative performances are also compared in this thesis.