Open Access. Powered by Scholars. Published by Universities.®
Articles 1 - 1 of 1
Full-Text Articles in Engineering
Capacitance-Voltage Analysis Of High-? Dielectric On Strained Silicon, Mike Latham
Capacitance-Voltage Analysis Of High-? Dielectric On Strained Silicon, Mike Latham
Journal of the Microelectronic Engineering Conference
Device characteristics are reported on Hf02 gate dielectrics deposited by atomic layer deposition (ALD), and jet vapor deposition (JVD) on strained-Si and bulk Si samples. Capacitance-Voltage (CV) analysis of samples shows comparable interface charge levels between strained-Si and bulk Si samples. A flat band shift of -0.5V was noted between the strained-Si and bulk Si for the JVD samples.