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Self-Timed Dram Data Interface, Rajesh Nerkar
Self-Timed Dram Data Interface, Rajesh Nerkar
Dissertations and Theses
A DRAM communicates with a processing unit via two interfaces: a data interface and a command interface. In today's DRAMs, also known as synchronous DRAMs (SDRAMs), both interfaces use a clock to communicate with the processing unit. The clock times the communication between the processing unit and the SDRAM on both the data interface and the command interface.
We propose a self-timed DRAM. The self-timed DRAM introduces more flexibility into the DRAM interface by eliminating the clock. The command interface and the data interface each communicate with the processing unit using a handshake protocol rather than a clock.
This thesis …
Just-In-Time Power Gating Of Gasp Circuits, Prachi Gulab Padwal
Just-In-Time Power Gating Of Gasp Circuits, Prachi Gulab Padwal
Dissertations and Theses
In modern integrated circuits, one way to reduce power consumption is to turn off power to parts of the circuit when those are idle. This method is called power gating. This thesis presents a state-preserving technique to achieve power savings in GasP family of asynchronous circuits by turning off the power when the circuit is idle. The power control logic turns on the power in anticipation of the receiving data. The power control logic turns off the power when the stage is idle either because it is empty or because the pipeline is clogged. The low logical effort of GasP …