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Unit Circle Roots Based Sensor Array Signal Processing, Jared P. Smith
Unit Circle Roots Based Sensor Array Signal Processing, Jared P. Smith
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As technology continues to rapidly evolve, the presence of sensor arrays and the algorithms processing the data they generate take an ever-increasing role in modern human life. From remote sensing to wireless communications, the importance of sensor signal processing cannot be understated. Capon's pioneering work on minimum variance distortionless response (MVDR) beamforming forms the basis of many modern sensor array signal processing (SASP) algorithms. In 2004, Steinhardt and Guerci proved that the roots of the polynomial corresponding to the optimal MVDR beamformer must lie on the unit circle, but this result was limited to only the MVDR. This dissertation contains …
Modeling The Tribo-Dynamic Behavior Of Roller Contact, Ali Kolivand
Modeling The Tribo-Dynamic Behavior Of Roller Contact, Ali Kolivand
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This study proposes dynamic modeling of lubricated rolling contact and a numerical sub-model for fatigue life prediction of rollers under starved lubrication conditions. Excitation caused by surface defects in rolling disks is numerically calculated and used as a metric in predicting surface pitting failure occurrence. Surface topography of mating surfaces is used as input to the model for determining maximum acceleration, approach velocity, and approach distance of rollers in presence of pits (defects). Resultant bearing force, contacting force versus approach distance are generated and compared for different pit sizes, developing an accurate tool for design purposes. Maximum acceleration and displacement …
Cmos Wide Tuning Gilbert Mixer With Controllable If Bandwidth In Upcoming Rf Front End For Multi-Band Multi-Standard Applications, Jianfeng Ren
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The current global system for mobile communications, wireless local area, Bluetooth, and ultra-wideband demands a multi-band/multi-standard RF front end that can access all the available bandwidth specifications. Trade-offs occur between power consumption, noise figure, and linearity in CMOS Gilbert mixer wide tuning designs. Besides, it is preferable to have a constant IF bandwidth for different gain settings as the bandwidth varies with the load impedance when an RF receiver is tuned to a higher frequency. My dissertation consists of three parts. First, a tunable constant IF bandwidth Gilbert mixer is introduced for multi-band standard wireless applications such as 802.11 a/b/g …
A Design Thinking Framework For Human-Centric Explainable Artificial Intelligence In Time-Critical Systems, Paul Benjamin Stone
A Design Thinking Framework For Human-Centric Explainable Artificial Intelligence In Time-Critical Systems, Paul Benjamin Stone
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Artificial Intelligence (AI) has seen a surge in popularity as increased computing power has made it more viable and useful. The increasing complexity of AI, however, leads to can lead to difficulty in understanding or interpreting the results of AI procedures, which can then lead to incorrect predictions, classifications, or analysis of outcomes. The result of these problems can be over-reliance on AI, under-reliance on AI, or simply confusion as to what the results mean. Additionally, the complexity of AI models can obscure the algorithmic, data and design biases to which all models are subject, which may exacerbate negative outcomes, …
Quadrature Phase-Domain Adpll With Integrated On-Line Amplitude Locked Loop Calibration For 5g Multi-Band Applications, Xiaomeng Zhang
Quadrature Phase-Domain Adpll With Integrated On-Line Amplitude Locked Loop Calibration For 5g Multi-Band Applications, Xiaomeng Zhang
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5th generation wireless systems (5G) have expanded frequency band coverage with the low-band 5G and mid-band 5G frequencies spanning 600 MHz to 4 GHz spectrum. This dissertation focuses on a microelectronic implementation of CMOS 65 nm design of an All-Digital Phase Lock Loop (ADPLL), which is a critical component for advanced 5G wireless transceivers. The ADPLL is designed to operate in the frequency bands of 600MHz-930MHz, 2.4GHz-2.8GHz and 3.4GHz-4.2GHz. Unique ADPLL sub-components include: 1) Digital Phase Frequency Detector, 2) Digital Loop Filter, 3) Channel Bank Select Circuit, and 4) Digital Control Oscillator. Integrated with the ADPLL is a 90-degree active …
Further Exploration Of Optical/Thermal Interaction Effects On High-Power Laser System Performance And Optimization Through Multiphysics System-Level Modeling, Nathaniel J. Butt
Further Exploration Of Optical/Thermal Interaction Effects On High-Power Laser System Performance And Optimization Through Multiphysics System-Level Modeling, Nathaniel J. Butt
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High-power laser systems (HPLS) have wide-ranging applications in many prominent areas. HPLS use laser diodes to pump fiber gain media. Understanding the functionality of both components is critical for achieving effective HPLS operation. System optical efficiency is a function of diode junction temperature. As junction temperature changes, the wavelength spectrum of the diode output shifts causing optical power losses in the fiber gain media. Optical/thermal interactions of the dynamically coupled laser diodes and fiber gain media are not fully understood. A system level modeling approach considering the interactions between optical performance and component temperature is necessary. Four distinct models were …
Low-Power, Low-Cost, & High-Performance Digital Designs : Multi-Bit Signed Multiplier Design Using 32nm Cmos Technology, N V Vijaya Krishna Boppana
Low-Power, Low-Cost, & High-Performance Digital Designs : Multi-Bit Signed Multiplier Design Using 32nm Cmos Technology, N V Vijaya Krishna Boppana
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Binary multipliers are ubiquitous in digital hardware. Digital multipliers along with the adders play a major role in computing, communicating, and controlling devices. Multipliers are used majorly in the areas of digital signal and image processing, central processing unit (CPU) of the computers, high-performance and parallel scientific computing, machine learning, physical layer design of the communication equipment, etc. The predominant presence and increasing demand for low-power, low-cost, and high-performance digital hardware led to this work of developing optimized multiplier designs. Two optimized designs are proposed in this work. One is an optimized 8 x 8 Booth multiplier architecture which is …