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Full-Text Articles in Engineering
A Simple Low-Voltage Cascode Current Mirror With Enhanced Dynamic Performance, Bradley Minch
A Simple Low-Voltage Cascode Current Mirror With Enhanced Dynamic Performance, Bradley Minch
Bradley Minch
In this paper, we present a simple low-voltage MOS cascode current mirror featuring a step response and an output voltage swing comparable to those of a simple mirror and and output resistance comparable to that of a stacked mirror. The proposed mirror operates with an input voltage of Vdiode+VDSsat and can operate on a minimum supply of Vdiode + 2VDSsat. We validate the proposed mirror with a combination of simulated and measured results from a circuit prototyped from transistor arrays fabricated in a 0.5-μm CMOS process through MOSIS.
Floating-Gate Devices: They Are Not Just For Digital Memories Anymore, Paul Hasler, Bradley Minch, Chris Diorio
Floating-Gate Devices: They Are Not Just For Digital Memories Anymore, Paul Hasler, Bradley Minch, Chris Diorio
Bradley Minch
Since the first reported floating-gate structure in 1967, floating-gate transistors have been used widely to store digital information for long periods in structures such as EPROMs and EEPROMs. Recently floating-gate devices have found applications as analog memories, analog and digital circuit elements, and adaptive processing elements. Floating-gate devices have found commerical applications, e.g. ISD, for long-term non-volatile information storage devices for analog applications. The focus of floating-gate devices has been towards fabrication in standard CMOS processes, as opposed to the specialized processes for fabricating digital non-volatile memories. Floating-gate circuits can be designed at any or all of three levels: analog …
Synthesis Of Multiple-Input Translinear Element Networks, Bradley Minch, Paul Hasler, Chris Diorio
Synthesis Of Multiple-Input Translinear Element Networks, Bradley Minch, Paul Hasler, Chris Diorio
Bradley Minch
We describe two systematic procedures for synthesizing multiple-input translinear element (MITE) networks that produce an output current that is equal to product of a number of input currents, each of which is raised to an arbitrary rational power. By using the first procedure, we obtain a MITE network, called a two-layer network, that is relatively insensitive to mismatch in the MITE weight values. By using the second procedure, we arrive at a MITE network, called a cascade network, that reduces the fan-in required of each MITE. We illustrate each ofthese procedures with an example.
A Floating-Gate Technology For Digital Cmos Processes, Bradley Minch, Paul Hasler
A Floating-Gate Technology For Digital Cmos Processes, Bradley Minch, Paul Hasler
Bradley Minch
We discuss the possibility of developing high-quality floating-gate memories and circuits in digital CMOS technologies that have only one layer of polysilicon. Here, the primary concern is whether or not we can get adequate control-gate linearity from MOS capacitors. We employ two experimental procedures to address this issue and find acceptable floating-gate circuit behaviour with MOS capacitors. First, we simultaneously characterize an MOS capacitor and a linear capacitor; the experimental data show that MOS capacitors behave similarly to linear capacitors over a finite, but usable range. Second, we characterize two typical floating-gateMOS circuit primitives, a floating-gate amplifier and a multiple-input …
Adaptive Circuits Using Pfet Floating-Gate Devices, Paul Hasler, Bradley Minch, Chris Diorio
Adaptive Circuits Using Pfet Floating-Gate Devices, Paul Hasler, Bradley Minch, Chris Diorio
Bradley Minch
In this paper, we describe our floating-gate pFET device, with its many circuit applications and supporting experimental measurements. We developed these devices in standard double-poly CMOS technologies by utilizing many effects inherent in these processes. We add floating-gate charge by electron tunneling, and we remove floating-gate charge by hot-electron injection. With this floating-gate technology, we cannot only build analog EEPROMs, we can also implement adaptation and learning when we consider floating-gate devices to be circuit elements with important time-domain dynamics. We start by discussing non-adaptive properties of floating-gate devices and we present two representative non-adaptive applications. First, we discuss using …
Optimal Synthesis Of Mite Translinear Loops, Shyam Subramanian, David Anderson, Paul Hasler, Bradley Minch
Optimal Synthesis Of Mite Translinear Loops, Shyam Subramanian, David Anderson, Paul Hasler, Bradley Minch
Bradley Minch
A procedure for synthesizing multiple-input translinear element (MITE) networks that implement a given system of translinear-loop equations (STLE) is presented. The minimum number of MITEs required for implementing the STLE, which is equal to the number of current variables in the STLE, is attained. The number of input gates ofthe MITEs is minimal amongst those MITE networks that satisfy the STLE and have the minimum number of MITEs. The synthesized MITE networks have a unique operating point and, in many cases, the network is guaranteed to be stable in a particular sense. This synthesis procedure exploits the relationship between MITEproduct-of-power-law …
Synthesis Of Translinear Analog Signal Processing Systems, Eric Mcdonald, Bradley Minch
Synthesis Of Translinear Analog Signal Processing Systems, Eric Mcdonald, Bradley Minch
Bradley Minch
In this paper, we describe a structured methodology for synthesizing translinear analog signal-processing systems from high-level descriptions in the time domain. The circuits are implemented from elements called multiple-input translinear elements (MITEs). We illustrate the synthesis methodology with the simple example ofan RMS-DC converter.
Programmable Multiple Input Translinear Elements, Haw-Jing Jo, Guillermo Serrano, Paul Hasler, David Anderson, Bradley Minch
Programmable Multiple Input Translinear Elements, Haw-Jing Jo, Guillermo Serrano, Paul Hasler, David Anderson, Bradley Minch
Bradley Minch
Large networks composed of multiple input translinear elements (MITEs) have been typically limited by the mismatches between individual MITEs. This paper presents the methodology that allows for such systems to be feasible through the application of floating-gate programming techniques. We introduce designs for a programmable MITE, and demonstrate the ability to systematically reduce offsets through accurate programming of example circuits.
A Low-Voltage Mos Cascode Current Mirror For All Current Levels, Bradley Minch
A Low-Voltage Mos Cascode Current Mirror For All Current Levels, Bradley Minch
Bradley Minch
In this paper, we describe a simple low-voltage MOS cascode current mirror that functions well at all current levels, ranging from weak inversion to strong inversion. The circuit features a wide output voltage swing and requires an input voltage of approximately one diode drop plus a saturation voltage. We present experimental results from a version of the current mirror that was fabricated in a 0.5 μm CMOS process along with a comparison with several other current mirrors with respect both to required input voltage and to output compliance voltage.
A Fully Programmable Log-Domain Bandpass Filter Using Multiple-Input Translinear Elements, Ravi Chawla, Haw-Jing Lo, Arindam Basu, Paul Hasler, Bradley Minch
A Fully Programmable Log-Domain Bandpass Filter Using Multiple-Input Translinear Elements, Ravi Chawla, Haw-Jing Lo, Arindam Basu, Paul Hasler, Bradley Minch
Bradley Minch
In this paper a second order log-domain bandpass filter using multiple input translinear elements (MITEs) operating at a 3V supply. We enhance the capabilities of the filter by utilizing programmable MITE structures as well as programmable current sources, which are covered in this paper. The synthesized bandpass filter is implemented and fabricated using these programmable translinear devices (MITEs). Experimental results are shown from circuit fabricated on a 0.5μm nwell CMOS process available through MOSIS.
Synthesis Of Dynamic Multiple-Input Translinear Element Networks, Bradley Minch
Synthesis Of Dynamic Multiple-Input Translinear Element Networks, Bradley Minch
Bradley Minch
In this paper, the author discusses an approach to the synthesis of dynamic translinear circuits built from multiple-input translation elements (MITEs). In this method, we realize separately the basic static nonlinearities and dynamic signal-processing functions that when cascaded together, form the system that one wishes to construct. The circuit is then simplified systematically through local transformations that do not alter the behavior of the system. The author illustrates the method by synthesizing a simple nonlinear dynamical system, an RMS-DC converter.
Adaptive Translinear Analog Signal Processing: A Prospectus, Eric Mcdonald, Kofi Odame, Bradley Minch
Adaptive Translinear Analog Signal Processing: A Prospectus, Eric Mcdonald, Kofi Odame, Bradley Minch
Bradley Minch
We have devised a systematic method of transforming high-level time-domain descriptions of linear and nonlinear adaptive signal-processing algorithms into compact, continuous-time analog circuitry using basic units called multiple-input translinear elements (MITEs). In this paper, we describe the current state of the art and illustrate the method with an example of an analog phase-locked loop (PLL).
Synthesis Of A Translinear Analog Adaptive Filter, Eric Mcdonald, Bradley Minch
Synthesis Of A Translinear Analog Adaptive Filter, Eric Mcdonald, Bradley Minch
Bradley Minch
In this paper, we present a methodology for synthesizing analog systems using a class of circuits called dynamic translinear circuits. We illustrate this method by synthesizing part of a Least-Mean-Squares (LMS) adaptation algorithm used in an analog adaptive filter. We present preliminary experimental results from a chip fabricated ina 0.5-μm double-poly CMOS process.
Inverting The Bipolar Differential Pair For Low-Voltage Applications, Bradley Minch
Inverting The Bipolar Differential Pair For Low-Voltage Applications, Bradley Minch
Bradley Minch
In this paper, the author presents a new bipolar differential transconductor that functions just like an emitter-degenerated differential pair, except for the following: it operates on a low power supply; it has a rail-to-rail common-mode input-voltage range; permits a wide output-voltage swing; has a transconductance gain that is nearly constant with the common-mode input voltage; and requires only n-p-n transistors in the signal path. We describe intuitively how the circuit functions and provide DC measurements from a prototype circuit, breadboarded from a quad TPQ3904 and a thick-film resistor array demonstrating proper operation on a single-ended 1.2-V power supply.
Highly Linear, Wide-Dynamic-Range Multiple-Input Translinear Element Networks, Kofi Odame, Eric Mcdonald, Bradley Minch
Highly Linear, Wide-Dynamic-Range Multiple-Input Translinear Element Networks, Kofi Odame, Eric Mcdonald, Bradley Minch
Bradley Minch
In this paper, we propose a modification to the class of circuits known as multiple input translinear element (MITE) networks. Our proposed modification leads to a MITE network that is free from certain nonidealities encountered in previous implementations. Further, the new MITE network described here readily accommodates the use of bipolar junction transistors in the input and output stages, thus implying a significantly wider dynamic range than we can achieve using subthreshold MOSFETs.
Synthesis Of Multiple-Input Translinear Element Log-Domain Filters, Bradley Minch
Synthesis Of Multiple-Input Translinear Element Log-Domain Filters, Bradley Minch
Bradley Minch
I present a simple procedure for synthesizing multiple-input translinear element (MITE) log-domain filters from state-space descriptions. We can obtain such state-space descriptions from a variety of sources, and the procedure that I describe can be utilized regardless of the source of the description. We can often derive such descriptions conveniently from already extant filters that have been previously implemented using a different class of filters. I shall illustrate the synthesis procedure by deriving two simple MITE log-domain filters from single-ended voltage-mode OTA-C filter prototypes-I synthesize both a first-order lowpass filter and a fully tunable second-order lowpass filter.
A Low-Voltage Mos Cascode Bias Circuit For All Current Levels, Bradley Minch
A Low-Voltage Mos Cascode Bias Circuit For All Current Levels, Bradley Minch
Bradley Minch
In this paper, the author describes a simple low-voltage MOS cascode bias circuit that functions well at all current levels, ranging from weak inversion to strong inversion. He describes an approach to defining the onset of saturation that is generally useful from a bias-circuit design viewpoint and explains specifically how it was used in designing the low-voltage cascode bias circuit. The author discusses an efficient strategy for laying out the cell in the full-stacked style. He also presents experimental results from a version of the bias circuit that was fabricated in a 1.2-μm CMOS process.
Multi-Level Simulation Of A Translinear Analog Adaptive Filter, Eric Mcdonald, Bradley Minch
Multi-Level Simulation Of A Translinear Analog Adaptive Filter, Eric Mcdonald, Bradley Minch
Bradley Minch
In this paper, we briefly discuss a methodology for synthesizing analog systems from a high-level behavioral specification using a class of circuits called dynamic translinear circuits. We illustrate this method by synthesizing a Least-Mean-Square (LMS) adaptation algorithm used in an analog adaptive filter. The resulting systems can be simulated at various levels of abstraction during the design phase. As an example, we presentsimulation results from a four-tap analog adaptive filter simulated using Matlab and SPICE.
Analog Vlsi Implementation Of Support Vector Machine Learning And Classification, Sheng-Yu Peng, Bradley Minch, Paul Hasler
Analog Vlsi Implementation Of Support Vector Machine Learning And Classification, Sheng-Yu Peng, Bradley Minch, Paul Hasler
Bradley Minch
We propose an analog VLSI approach to implementing the projection neural networks adapted for the supportvector machine with radial-basis kernel functions, which are realized by a proposed floating-gate bump circuit with the adjustable width. Other proposed circuits include simple current mirrors and log-domain Alters. Neither resistors nor amplifiers are employed. Therefore it is suitable for large-scale neural network implementations. We show the measurement results of the bump circuit and verify the resulting analog signal processing system on the transistor level by using a SPICE simulator. The same approach can also be applied to the support vectorregression. With these analog signal …
A Long-Channel Model For The Asymmetric Double-Gate Mosfet Valid In All Regions Of Operation, Abhishek Kammula, Bradley Minch
A Long-Channel Model For The Asymmetric Double-Gate Mosfet Valid In All Regions Of Operation, Abhishek Kammula, Bradley Minch
Bradley Minch
We present a physically based, continuous analytical model for long-channel double-gate MOSFETs. The model is particularly well suited for implementation in circuit simulators due to the simple expressions for the current andthe continuous nature of the derivatives of the current which improves convergence behavior.
A Folded Floating-Gate Differential Pair For Low-Voltage Applications, Bradley Minch
A Folded Floating-Gate Differential Pair For Low-Voltage Applications, Bradley Minch
Bradley Minch
The author presents a new folded differential pair topology that is suitable for low-voltage applications. The new differential pair is made from floating-gate MOS (FGMOS) transistors and simultaneously provides a rail-to-rail common-mode input voltage range with a high rejection of the common-mode input voltage by keeping the sum of the two output currents fixed. Moreover, when biased in weak or moderate inversion, the allowable output voltage swing is also almost from rail-to-rail. The author discusses the operation of the circuit and some of the trade-offs involved in its design. He also shows experimental measurements from a version of the circuit, …
A Transistor-Only Circuit Model Of The Autozeroing Floating-Gate Amplifier, Paul Hasler, Matt Kucic, Bradley Minch
A Transistor-Only Circuit Model Of The Autozeroing Floating-Gate Amplifier, Paul Hasler, Matt Kucic, Bradley Minch
Bradley Minch
We developed an transistor-only version of our autozeroing floating-gate amplifier (AFGA). We use a subthreshold transistor to model the behavior of an electron-tunneling device, and we use another subthreshold transistor to model the behavior of pFET hot-electron injection. We have derived analytical models that completely characterize the amplifier and that are in good agreement with experimental data. This circuit is a bandpass filter, and behaves similarly to the AFGA with different operating parameters. Both the low-frequency and high-frequency cutoffs are controlled electronically, as is done in continuous-time filters. This circuit has a low-frequency cutoff at frequencies above 1 Hz, and …
A Simple Way To Extend The Common-Mode Input-Voltage Range Of The Mos Differential Pair, Bradley Minch
A Simple Way To Extend The Common-Mode Input-Voltage Range Of The Mos Differential Pair, Bradley Minch
Bradley Minch
In this paper, we describe a simple technique involving indirect negative feedback that extends the useable common-mode input-voltage range of the MOS differential pair by a saturation voltage. In this method, we use a replica differential pair to sense when the bias transistor supplying the tail current falls out of saturation. We then set the bias voltage so that the sum of the two differential-pair output currents is equal to the bias current. We present experimental results from a version of the differential pair that was fabricated in a 0.5 μm CMOS process along with a comparison with an identical …
Synthesis Of Mite Log-Domain Filters With Unique Operating Points, Shyam Subramanian, David Anderson, Paul Hasler, Bradley Minch
Synthesis Of Mite Log-Domain Filters With Unique Operating Points, Shyam Subramanian, David Anderson, Paul Hasler, Bradley Minch
Bradley Minch
Practical log-domain filter circuits might have multiple operating points in regions in which the translinear element does not obey the exponential law. In this paper, a method is proposed to implement any filter by a log-domain circuit that necessarily has a unique operating point. Any state-space description of the filter is shown to have an equivalent description that can be implemented by such a circuit. This methodology is applied to the synthesis of multiple-input translinear element (MITE) filters. As an example, shifted-companion-form (SCF) filters are synthesized. Further, it is proved that the resulting filters have a unique operating point.
Low-Voltage Wilson Current Mirrors In Cmos, Bradley Minch
Low-Voltage Wilson Current Mirrors In Cmos, Bradley Minch
Bradley Minch
In this paper, we describe three simple low-voltage CMOS analogs of the Wilson current mirror that function well at all current levels, ranging from weak inversion to strong inversion. Each of these current mirrors can operate on a low power-supply voltage of a diode drop plus two saturation voltages and features a wide output-voltage swing with a cascode-type incremental output impedance. Two of the circuits requires an input voltage of a diode drop plus a saturation voltage while the third one features a low input voltage of a saturation voltage. We present experimental results from versions of these three current …
Low Voltage And Performance Tunable Cmos Circuit Design Using Independently Driven Double Gate Mosfets, Arvind Kumar, Bradley Minch, Sandip Tiwari
Low Voltage And Performance Tunable Cmos Circuit Design Using Independently Driven Double Gate Mosfets, Arvind Kumar, Bradley Minch, Sandip Tiwari
Bradley Minch
Independently driven double-gate MOSFETs (DGFETs) facilitate design of analog circuits under digital logic constraints and provide in-circuit parameter adaptability through threshold voltage control. Threshold voltagetuning is achieved by biasing one of the two gates where as strong coupling of surface potentials at the two interfaces provides a low resistance feedback path. The geometry also allows a back-floating gate NVRAM structure with superior scalability and floating gate related analog applications without any read disturbance. This paper gives examples across breadth of circuits where this tunability is exploited.
Floating-Gate Techniques For Assessing Mismatch, Bradley Minch
Floating-Gate Techniques For Assessing Mismatch, Bradley Minch
Bradley Minch
I discuss the importance of capacitor matching in the context of using charge stored on floating-gate MOS (FGMOS) transistors to compensate for transistor mismatch in analog circuits. I describe a simple technique that only involves static measurements for assessing the relative mismatch between capacitors. I also show experimental measurements of capacitor mismatch for small capacitors fabricated in 1.2-μm and 0.35-μm double-poly it n-well CMOS process that are commonly available.
A Simple Class-Ab Transconductor In Cmos, Bradley Minch
A Simple Class-Ab Transconductor In Cmos, Bradley Minch
Bradley Minch
In this paper, we present a simple class-AB CMOS transconductor, which is based on Delbriick's bump/antibump circuit, whose differential output current is an expansive nonlinear function of its differential-mode input voltage. We describe the operation of the new transconductor qualitatively and derive an analytical model of its output currents from the Enz-Krummenacher-Vittoz (EKV) model of the MOS transistor. We also provide experimental measurements of the DC transfer characteristics of a version of the circuit that was fabricated in a 0.5-mumCMOS process through MOSIS.
Evolution Of A Folded Floating-Gate Differential Pair, Bradley Minch
Evolution Of A Folded Floating-Gate Differential Pair, Bradley Minch
Bradley Minch
The author presents a folded floating-gate MOS (FGMOS) differential pair circuit that is capable of simultaneously providing a rail-to-rail common-mode input voltage range and a rail-to-rail output voltage swing with a low power-supply voltage. In this configuration, the voltage drop across the bias current source is folded up into the same range over which the output voltages swing, facilitating low-voltage operation. The floating-gate charge can be used to trim out the offset voltage of the differential pair and to reduce the required power-supply voltage for a given bias current level. The author provides both a qualitative description of how the …
A Programmable Floating-Gate Bump Circuit With Variable Width, Sheng-Yu Peng, Bradley Minch, Paul Hasler
A Programmable Floating-Gate Bump Circuit With Variable Width, Sheng-Yu Peng, Bradley Minch, Paul Hasler
Bradley Minch
We propose a new programmable bump circuit using floating-gate transistors with a simple topology. The center and the width of this bump circuit are orthogonally tunable and programmable. The input signal range is rail to rail and the power consumption does not change dramatically while varying the width. Therefore, this circuit is suitable for low power applications. We use a vector-quantizer as an example to illustrate how this circuit fits into a large scale network.