Engineering Commons^™

An Atm-Based Intelligent Optical Backplane Using Cmos-Seed Smart Pixel Arrays And Free- Space Optical Interconnect Modules, Dominic J. Goodwill, Kent E. Devenport, Harvard Scott Hinton

Electrical and Computer Engineering Faculty Publications

The architecture, smart pixel array chip design, and optical design of an intelligent free-space digital optical backplane for ATM switching are presented. The smart pixel chip uses reflective SEED (self-electrooptic effect device) optical modulators and detectors flip-chip bonded to CMOS circuitry. This chip is one of the most complex designs ever reported in this technology, and it operates at a simulated backplane clock rate of 125 MHz. The low-loss optical system employs f/4 diffractive minilenses and microlenses to interconnect clusters of smart pixels, and it is shown to allow 2060 connections per chip if 1-cm2 -sized smart pixel chips are …