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Articles 1 - 4 of 4
Full-Text Articles in Engineering
Iii-Nitride Transistors With Capacitively Coupled Contacts, Grigory Simin, Z.-J. Yang, A. Koudymov, V. Adivarahan, M. Asif Khan
Iii-Nitride Transistors With Capacitively Coupled Contacts, Grigory Simin, Z.-J. Yang, A. Koudymov, V. Adivarahan, M. Asif Khan
Faculty Publications
AlGaN∕GaNheterostructure field-effect transistor design using capacitively coupled contacts (C3HFET) is presented. Insulated-gate [C3 metal-oxide-semiconductor HFET(C3MOSHFET)] has also been realized. The capacitively coupled source, gate, and drain of C3 device do not require annealedOhmic contacts and can be fabricated using gate alignment-free technology. For typical AlGaN∕GaNheterostructures, the equivalent contact resistance of C3 transistors is below 0.6Ωmm. In rf-control applications, the C3HFET and especially the C3MOSHFET have much higher operating rf powers as compared to HFETs.C3 design is instrumental for studying the two-dimensional electron gas transport in other wide band gap …
Algan/Gan/Algan Double Heterostructure For High-Power Iii-N Field-Effect Transistors, C. Q. Chen, J. P. Zhang, V. Adivarahan, A. Koudymov, H. Fatima, Grigory Simin, J. Yang, M. Asif Khan
Algan/Gan/Algan Double Heterostructure For High-Power Iii-N Field-Effect Transistors, C. Q. Chen, J. P. Zhang, V. Adivarahan, A. Koudymov, H. Fatima, Grigory Simin, J. Yang, M. Asif Khan
Faculty Publications
We propose and demonstrate an AlGaN/GaN/AlGaN double heterostructure (DH) with significantly improved two-dimensional (2D) confinement for high-power III-N heterostructurefield-effect transistors(HFETs). The DH was grown directly on an AlN buffer over i-SiC substrate. It enables an excellent confinement of the 2D gas and also does not suffer from the parasitic channel formation as experienced in past designs grown over GaN buffer layers. Elimination of the GaN buffer modifies the strain distribution in the DH, enabling Al contents in the barrier region well over 30%. For the AlGaN/GaN/AlGaN DH design, the 2D electron gasmobility achieved was 1150 cm2/V s at …
Digital Oxide Deposition Of Sio2 Layers For Iii-Nitride Metal-Oxide-Semiconductor Heterostructure Field-Effect Transistors, V. Adivarahan, S. Rai, N. Tipirneni, A. Koudymov, J. Yang, Grigory Simin, M. Asif Khan
Digital Oxide Deposition Of Sio2 Layers For Iii-Nitride Metal-Oxide-Semiconductor Heterostructure Field-Effect Transistors, V. Adivarahan, S. Rai, N. Tipirneni, A. Koudymov, J. Yang, Grigory Simin, M. Asif Khan
Faculty Publications
We present a digital-oxide-deposition (DOD) technique to deposit high quality SiO2dielectric layers by plasma-enhanced chemical vapor deposition using alternate pulses of silicon and oxygen precursors. The DOD procedure allows for a precise thickness control and results in extremely smooth insulating SiO2 layers. An insulating gate AlGaN∕GaNheterostructurefield-effect transistor(HFET) with 8nm thick DOD SiO2dielectric layer had a threshold voltage of −6V (only 1V higher than that of regular HFET), very low threshold voltage dispersion, and output continuous wave rf power of 15W∕mm at 55V drain bias.
Erratum: “Terahertz Studies Of The Dielectric Response And Second-Order Phonons In A Gase Crystal” [Appl. Phys. Lett.87, 182104 (2005)], B. L. Yu, F. Zeng, V. Kartazayev, R. R. Alfano, K. C. Mandal
Erratum: “Terahertz Studies Of The Dielectric Response And Second-Order Phonons In A Gase Crystal” [Appl. Phys. Lett.87, 182104 (2005)], B. L. Yu, F. Zeng, V. Kartazayev, R. R. Alfano, K. C. Mandal
Faculty Publications
No abstract provided.