Engineering Commons^™

Fabrication Of Oxide-Based Memristors For Neural Networks, Jamison E. Wagner

Electrical and Computer Engineering ETDs

This thesis discusses what a memristor is, how it is hypothesized to work and the fabrication work undertaken with hafnia and titania-based ultrathin oxide films. In addition, the electrical tests utilized to characterize the physical performance of the memristors including but not limited to, their IV hysteresis responses, yield rates and overall reliability. The results and discussion of this work are aimed at better understanding how fabrication of memristive devices can be further improved for future work.

A Novel Application Of Machine Learning Methods To Model Microcontroller Upset Due To Intentional Electromagnetic Interference, Rusmir Bilalic

Electrical and Computer Engineering ETDs

A novel application of support vector machines (SVMs), artificial neural networks (ANNs), and Gaussian processes (GPs) for machine learning (GPML) to model microcontroller unit (MCU) upset due to intentional electromagnetic interference (IEMI) is presented. In this approach, an MCU performs a counting operation (0-7) while electromagnetic interference in the form of a radio frequency (RF) pulse is direct-injected into the MCU clock line. Injection times with respect to the clock signal are the clock low, clock rising edge, clock high, and the clock falling edge periods in the clock window during which the MCU is performing initialization and executing the …

A Leaky Integrate-And-Fire Neuron With Adjustable Refractory Period And Spike Frequency Adaptation, Jacob N. Healy

Electrical and Computer Engineering ETDs

As standard CMOS technology approaches its physical limitations there is increased motivation to explore new computing paradigms. One possible path forward is to develop an array of computational architectures which specialize in distinct tasks. Neural computing architectures excel at pattern recognition and processing low-fidelity sensory input, but one of the biggest challenges in the field has been implementing architectures which strike an appropriate balance between biologically-plausible performance and the simplicity needed to make large neural systems practical. This work proposes a new VLSI neural architecture which seeks to provide such a balance.

The design described here builds on an implementation …