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Full-Text Articles in Engineering
The Design Of A Processing Element For The Systolic Array Implementation Of A Kalman Filter, John P. Condorodis
The Design Of A Processing Element For The Systolic Array Implementation Of A Kalman Filter, John P. Condorodis
Retrospective Theses and Dissertations
The Kalman filter is an important component of optimal estimation theory. It has applications in a wide range of high performance control systems including navigational, fire control, and targeting systems. The Kalman filter, however, has not been utilized to its full potential due to the limitations of its inherent computational intensiveness which requires "off-line" processing or allows only low bandwidth real-time applications.
The recent advances in VLSI circuit technology have created the opportunity to design algorithms and data structures for direct implementation in integrated circuits. A systolic architecture is a concept which allows the construction of massively parallel systems in …
Implementation Of Inversion Algorithms In Reconfigurable Systolic Arrays, Haritini E. Andre
Implementation Of Inversion Algorithms In Reconfigurable Systolic Arrays, Haritini E. Andre
Retrospective Theses and Dissertations
Reducing the computing time of the matrix inversion has been a concern of many authors. The use of Systolic architectures containing orthogonally connected processing elements capable of few instructions multiple data have allowed for new algorithms to be implemented. Two algorithms are examined that rely on the triangularization methods for matrix inversion. One can be applied to the general non-singular matrix and the other to the symmetric matrix. The throughput in both implementation is revolutionized. The speed improvement over Liu and Young’s implementation of the symmetric matrix inversion is by a factor of three.
The throughput in both implementation is …
Implementation Of A Parallel Ynet Architecture, Julie Nadeau Leblanc
Implementation Of A Parallel Ynet Architecture, Julie Nadeau Leblanc
Retrospective Theses and Dissertations
A simulation of an alternate implementation of a redundant busing network based on the Teradata Ynet architecture is presented. An overview of the Teradata DBC/1012 data base parallel processing computer including the Ynet, an active logic busing network, is given. Other multiprocessor busing networks are examined and compared to the standard Ynet and the alternate Ynet.
In the standard Ynet system, two networks, called Ynets, process message packets concurrently. When one of the Ynet paths fails, the system is reset. The remaining Ynet path restarts using the previously interrupted packets and processing continues without the aid of the failed Ynet. …