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Selected Works

Electrical and Computer Engineering

Ronald Greenberg

Parallel computation

Articles 1 - 3 of 3

Full-Text Articles in Engineering

Randomized Routing On Fat-Trees, Ronald I. Greenberg, Charles E. Leiserson Jan 2018

Randomized Routing On Fat-Trees, Ronald I. Greenberg, Charles E. Leiserson

Ronald Greenberg

Fat-trees are a class of routing networks for hardware-efficient parallel computation. This paper presents a randomized algorithm for routing messages on a fat-tree. The quality of the algorithm is measured in terms of the load factor of a set of messages to be routed, which is a lower bound on the time required to deliver the messages. We show that if a set of messages has load factor lambda on a fat-tree with n processors, the number of delivery cycles (routing attempts) that the algorithm requires is O(lambda + lg n lg lg n) with probability 1-O(1/n). The best previous …


Randomized Routing On Fat-Trees, Ronald I. Greenberg Jan 2018

Randomized Routing On Fat-Trees, Ronald I. Greenberg

Ronald Greenberg

Fat-trees are a class of routing networks for hardware-efficient parallel computation. This paper presents a randomized algorithm for routing messages on a fat-tree. The quality of the algorithm is measured in terms of the load factor of a set of messages to be routed, which is a lower bound on the time required to deliver the messages. We show that if a set of messages has load factor lambda on a fat-tree with n processors, the number of delivery cycles (routing attempts) that the algorithm requires is O(lambda+lgnlglgn) with probability 1-O(1/ …


Efficient Interconnection Schemes For Vlsi And Parallel Computation, Ronald I. Greenberg Jan 2018

Efficient Interconnection Schemes For Vlsi And Parallel Computation, Ronald I. Greenberg

Ronald Greenberg

This thesis is primarily concerned with two problems of interconnecting components in VLSI technologies. In the first case, the goal is to construct efficient interconnection networks for general-purpose parallel computers. The second problem is a more specialized problem in the design of VLSI chips, namely multilayer channel routing. In addition, a final part of this thesis provides lower bounds on the area required for VLSI implementations of finite-state machines. This thesis shows that networks based on Leiserson's fat-tree architecture are nearly as good as any network built in a comparable amount of physical space. It shows that these "universal" networks …