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Fabrication Of Fully Isolated Nfets Using Oxidized Porous Silicon, A Chadwick, K D. Hirschman
Fabrication Of Fully Isolated Nfets Using Oxidized Porous Silicon, A Chadwick, K D. Hirschman
Journal of the Microelectronic Engineering Conference
SOl (Silicon on Insulator) technology is an option in improving device performance as smaller devices run into scaling challenges. The devices for this study were fabricated using a FIPOS (Fully Isolated Porous Oxidized Silicon) process, which results in localized SOl active regions. The oxidation of electrochemically etched porous silicon (PSi) has demonstrated success in the formation of device quality localized S01 for CMOS applications 11,21. The formation of PSi can be done selectively by controlling the Fermi level in areas to be etched or not etched, which is typically done by adjusting the level of doping Ill. An alternative method …
Fabrication Of Fully Isolated Nfets Using Oxidized Porous Silicon, A Chadwick, K D. Hirschman
Fabrication Of Fully Isolated Nfets Using Oxidized Porous Silicon, A Chadwick, K D. Hirschman
Journal of the Microelectronic Engineering Conference
SOI (Silicon on Insulator) technology is an option in improving device performance as smaller devices run into scaling challenges. The devices for this study were fabricated using a FIPOS (Fully Isolated Porous Oxidized Silicon) process, which results in localized SOJ active regions. The oxidation of electrochemically etched porous silicon (PSi) has demonstrated success in the formation of device quality localized SOl for CMOS applications [1,2]. The formation of PSi can be done selectively by controlling the Fermi level in areas to be etched or not etched, which is typically (lone by adjusting the level of (loping [1]. An alternative method …