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Portland State University

Theses/Dissertations

Array processors -- Design and construction

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Full-Text Articles in Engineering

Equivalent Relationship Of Function-Level Representation And Implementation Of Unified Indexing Of Fft Algorithms, Nee-Hua Cho Nov 1995

Equivalent Relationship Of Function-Level Representation And Implementation Of Unified Indexing Of Fft Algorithms, Nee-Hua Cho

Dissertations and Theses

With the advance of the VLSI technology, the FFT algorithm has been pushed further in solving the multidimensional array signal processing in real time. Many DSP chip users have tried to find ways to improve addressing huge data in multidimension systems with minimum cost and maximum performance. However, there is no efficient method to address data for 1-D to M-D FFTs.

A methodology has been defined to conquer the addressing problem of M-D FFT. It is well known that the twiddle factor matrix of Discrete Fourier Transform (DFT) can be recursively factored into basic butterfly stage matrices. The matrix can …


The Design, Realization And Testing Of The Ilu Of The Ccm2 Using Fpga Technology, David W. Foote Jun 1994

The Design, Realization And Testing Of The Ilu Of The Ccm2 Using Fpga Technology, David W. Foote

Dissertations and Theses

Most existing computers today are built upon a subset of the arithmetic system which is based upon the foundation of set theory. All formal systems can be expressed in terms of arithmetic and logic on current arithmetic computers through an appropriate model, then work with the model using software manipulation. However, severe speed degradation is the price one must pay for using a software-based approach, making several high-level formal systems impractical.

To improve the speed at which computers can implement these high-level systems, one must either design special hardware, implementing specific operations much like math and image processing coprocessors, or …