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A Novel Power Integrity Modeling Method Based On Plane Pair Peec, Siqi Bai
A Novel Power Integrity Modeling Method Based On Plane Pair Peec, Siqi Bai
Masters Theses
"A low impedance power distribution network (PDN) is essential for high frequency integrated circuits. A novel modeling mothed, i.e. the plane pair PEEC method is proposed in this thesis to model the PDN of the multi-layered printed circuit board. The modeling results agrees favorably with full wave simulation and measurement. A PDN tool is develop based on this method"--Abstract, page iii.
System Level Power Integrity Transient Analysis Using A Physics-Based Approach, Jun Xu
System Level Power Integrity Transient Analysis Using A Physics-Based Approach, Jun Xu
Masters Theses
"With decreasing supply voltage level and massive demanding current on system chipset, power integrity design becomes more and more critical for system stability. The ultimate goal of well-designed power delivery network (PDN) is to deliver desired voltage level from the source to destination, in other words, to minimize voltage noise delivered to digital devices. The thesis is composed of three parts. The first part focuses on-die level power models including simplified chip power model (CPM) for system level analysis and the worst scenario current profile. The second part of this work introduces the physics-based equivalent circuit model to simplify the …
A Hybrid Cavity And Parallel-Plate Peec Method For Analysis Of Complex Power Net Area Fills, And A Tool Development For Peak Distortion Analysis, Chenxi Huang
Masters Theses
"Modern ASICs and FPGAs are becoming more and more dense, which is causing an increasing demand of the current draw from the power distribution network (PDN). And one of the main design objectives of a power distribution network is to reduce the voltage noise ripple below a specified allowable limit. Although the target impedance is a commonly used criterion in most PDN designs, it may not be efficient because it's usually rather pessimistic. Herein a time domain voltage ripple decomposition approach is proposed to avoid overdesign as well as provide design guidance to PI engineers. Based on a physics-based circuit …