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Open Access. Powered by Scholars. Published by Universities.®

Brigham Young University

2021

FPGA

Articles 1 - 4 of 4

Full-Text Articles in Engineering

Statistical Method For Extracting Radiation-Induced Multi-Cell Upsets And Anomalies In Sram-Based Fpgas, Juan Andres Perez Celis Nov 2021

Statistical Method For Extracting Radiation-Induced Multi-Cell Upsets And Anomalies In Sram-Based Fpgas, Juan Andres Perez Celis

Theses and Dissertations

FPGAs are susceptible to radiation-induced effects that change the data in the configuration memory. These effects can cause the malfunction of the system. Triple modular redundancy has extensively been used to improve the circuit's cross-section. However, TMR has shown to be particularly susceptible to radiation effects that affect more than one memory cell such as Multiple Cell Upsets (MCU) or micro-Single Event Functional Interrupts (micro-SEFI). This work describes a statistical technique to extract Multi-Cell Upset (MCU) and micro-SEFI events from raw radiation upset data. The technique uses Poisson statistics to identify patterns in the data. The most common patterns are …


Transparent Capacitive And Piezoelectric Micromachined Ultrasonic Transducers For Tactile Feedback With 3d Displays, Emily Anne Laughlin Aug 2021

Transparent Capacitive And Piezoelectric Micromachined Ultrasonic Transducers For Tactile Feedback With 3d Displays, Emily Anne Laughlin

Theses and Dissertations

3D display technology is limited by the user's ability to interact with displays without being connected to external equipment. In order to feel tactile feedback in conjunction with displays, ultrasonic sound pressure fields have been created; however, ceramic transducers interfere with the user's immersive experience. We have created transparent ultrasonic transducers using capacitive micromachined ultrasonic transducer (CMUT) and piezoelectric micromachined ultrasonic transducer (PMUT) technology that allow the user to remain immersed in the experience while interacting with the display. Individual transparent piezoelectric transducers made with indium tin oxide (ITO) and polyvinylidene fluoride (PVDF) generate 66.9dB with 91.6% transparency. Samples were …


High-Speed Image Classification For Resource-Limited Systems Using Binary Values, Taylor Scott Simons Jun 2021

High-Speed Image Classification For Resource-Limited Systems Using Binary Values, Taylor Scott Simons

Theses and Dissertations

Image classification is a memory- and compute-intensive task. It is difficult to implement high-speed image classification algorithms on resource-limited systems like FPGAs and embedded computers. Most image classification algorithms require many fixed- and/or floating-point operations and values. In this work, we explore the use of binary values to reduce the memory and compute requirements of image classification algorithms. Our objective was to implement these algorithms on resource-limited systems while maintaining comparable accuracy and high speeds. By implementing high-speed image classification algorithms on resource-limited systems like embedded computers, FPGAs, and ASICs, automated visual inspection can be performed on small low-powered systems. …


Turtle: A Fault Injection Platform For Sram-Based Fpgas, Corbin Alma Thurlow Jun 2021

Turtle: A Fault Injection Platform For Sram-Based Fpgas, Corbin Alma Thurlow

Theses and Dissertations

SRAM-Based FPGAs provide valuable computation resources and reconfigurability; however, FPGA designs can fail during operation due to ionizing radiation. As an SRAM-based device, these FPGAs store operation-critical information in configuration RAM, or CRAM. Testing, through radiation tests, can be performed to prove the effectiveness of SEU mitigation techniques by comparing the SEU sensitivity of an FPGA design with and without the mitigation techniques applied. However, radiation testing is expensive and time-consuming. Another method for SEU sensitivity testing is through fault injection. This work describes a low-cost fault injection platform for evaluating the SEU sensitivity of an SRAM-based FPGA design by …