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A Secure, Reliable And Performance-Enhancing Storage Architecture Integrating Local And Cloud-Based Storage, Christopher Glenn Hansen
A Secure, Reliable And Performance-Enhancing Storage Architecture Integrating Local And Cloud-Based Storage, Christopher Glenn Hansen
Theses and Dissertations
The constant evolution of new varieties of computing systems - cloud computing, mobile devices, and Internet of Things, to name a few - have necessitated a growing need for highly reliable, available, secure, and high-performing storage systems. While CPU performance has typically scaled with Moore's Law, data storage is much less consistent in how quickly performance increases over time. One method of improving storage performance is through the use of special storage architectures. Such architectures often include redundant arrays of independent disks (RAID). RAID provides a meaningful way to increase storage performance on a variety of levels, some higher-performing than …
Duplicate With Choose: Using Statistics For Fault Mitigation, Jon-Paul Anderson
Duplicate With Choose: Using Statistics For Fault Mitigation, Jon-Paul Anderson
Theses and Dissertations
This dissertation presents a novel technique called duplicate with choose (DWCh) which is a modification of the fault detection technique duplicate with compare (DWC). DWCh adds a smart decider block to DWC that monitors the duplicated circuits and decides which circuit is fault free when a fault occurs. If chosen correctly, DWCh is able to mask faults at a lower cost than conventional techniques like TMR.This dissertation derives reliability expressions for DWCh showing that under ideal conditions its reliability exceeds the most commonly used fault masking technique for spacecraft, triple modular redundancy. For non-ideal conditions, DWCh provides a lower cost …
Measuring Soft Error Sensitivity Of Fpga Soft Processor Designs Using Fault Injection, Nathan Arthur Harward
Measuring Soft Error Sensitivity Of Fpga Soft Processor Designs Using Fault Injection, Nathan Arthur Harward
Theses and Dissertations
Increasingly, soft processors are being considered for use within FPGA-based reliable computing systems. In an environment in which radiation is a concern, such as space, the logic and routing (configuration memory) of soft processors are sensitive to radiation effects, including single event upsets (SEUs). Thus, effective tools are needed to evaluate and estimate how sensitive the configuration memories of soft processors are in high-radiation environments. A high-speed FPGA fault injection system and methodology were created using the Xilinx Radiation Test Consortium's (XRTC's) Virtex-5 radiation test hardware to conduct exhaustive tests of the SEU sensitivity of a design within an FPGA's …