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Low-Voltage Analog Cmos Architectures And Design Methods, Kent Downing Layton
Low-Voltage Analog Cmos Architectures And Design Methods, Kent Downing Layton
Theses and Dissertations
This dissertation develops design methods and architectures which allow analog circuits to operate at VT + 2Vds,sat, the minimum supply for CMOS circuits with all transistors in the active region where Vds,sat is the drain to source saturation voltage of a MOS transistor. Techniques which meet this criteria for rail-to-rail input stages, gain enhancement stages, and output stages are discussed and developed. These techniques are used to design four fully-differential rail-to-rail amplifiers. The highest gain is shown to be attained using a drain voltage equalization (DVE) or active-bootstrapping technique which produces more than 100dB of gain in a two stage …
Performance Of Mimo Space-Time Coding Algorithms On A Parallel Dsp Test Platform, Beau C. Neal
Performance Of Mimo Space-Time Coding Algorithms On A Parallel Dsp Test Platform, Beau C. Neal
Theses and Dissertations
Commercial Off The Shelf (COTS) hardware has the advantages of low cost, modularity, and is easily upgraded. For Multiple-Input Multiple-Output (MIMO) space-time algorithms to be practical they must have the processing capability to execute in real-time. This makes COTS ideal for real-time MIMO research where the processing power increases exponentially with a linear increase in antennas. The BYU Electrical Engineering wireless lab has designed and built an eight processor transmitter and a twenty processor receiver to research and develop MIMO wireless communication. The Alamouti, 2 x 2 and 4 x 4 differential space-time MIMO algorithms have been partially implemented on …