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Oxide Passivated Nanocrystalline Silicon Trap-Controlled Memory Devices
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Oxide Passivated Nanocrystalline Silicon Trap-Controlled Memory Devices, Burcay Gurcan
Oxide Passivated Nanocrystalline Silicon Trap-Controlled Memory Devices, Burcay Gurcan
Journal of the Microelectronic Engineering Conference
An alternative to the single floating gate on a standard EEPROM device could be a continuous semi insulating layer in which the distribution of charge can be controlled. By partial oxidation of porous silicon, a new material named Oxide Passivated Nanocrystalline Silicon (OPNSi) is formed, which has embedded Si nanocrystals in a porous glass structure. With oxide barriers between silicon nanocrystals, carriers can be confined to the silicon crystallites or trapped at interface states on the surface of these nanocrystals. With the assistance of an electric field, carriers can undergo direct tunneling through the very thin barriers and alter the …