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Variation Aware Placement For Efficient Key Generation Using Physically Unclonable Functions In Reconfigurable Systems, Shrikant S. Vyas
Variation Aware Placement For Efficient Key Generation Using Physically Unclonable Functions In Reconfigurable Systems, Shrikant S. Vyas
Masters Theses
With the importance of data security at its peak today, many reconfigurable systems are used to provide security. This protection is often provided by FPGA-based encrypt/decrypt cores secured with secret keys. Physical unclonable functions (PUFs) use random manufacturing variations to generate outputs that can be used in keys. These outputs are specific to a chip and can be used to create device-tied secret keys. Due to reliability issues with PUFs, key generation with PUFs typically requires error correction techniques. This can result in substantial hardware costs. Thus, the total cost of a $n$-bit key far exceeds just the cost of …
Processor Temperature And Reliability Estimation Using Activity Counters, Mayank Chhablani
Processor Temperature And Reliability Estimation Using Activity Counters, Mayank Chhablani
Masters Theses
With the advent of technology scaling lifetime reliability is an emerging threat in high-performance and deadline-critical systems. High on-chip thermal gradients accelerates localised thermal elevations (hotspots) which increases the aging rate of the semiconductor devices. As a result, reliable operation of the processors has become a challenging task. Therefore, cost effective schemes for estimating temperature and reliability are crucial. In this work we present a reliability estimation scheme that is based on a light-weight temperature estimation technique that monitors hardware events. Unlike previously pro- posed hardware counter-based approaches, our approach involves a linear-temporal-feedback estimator, taking into account the effects of …