Engineering Commons^™

A Case Study In Cmos Design Scaling For Analog Applications: The Ringamp Ldo, Steven Corum

Masters Theses

As CMOS process nodes scale to smaller feature sizes, process optimizations are made to achieve improvements in digital circuit performance, such as increasing speed and memory, while decreasing power consumption. Unfortunately for analog design, these optimizations usually come at the expense of poorer transistor performance, such as reduced small signal output resistance and increased channel length modulation. The ring amplifier has been proposed as a digital solution to the analog scaling problem, by configuring digital inverters to function as analog amplifiers through deadzone biasing. As digital inverters naturally scale, the ring amplifier is a promising area of exploration for analog …

A Low Power, Rad-Hard, Ecl Standard Cell Library, Zakaraya A. Hamdan

Masters Theses

Space exploration for life both inside and outside of our solar system demand the design and fabrication of robust, reliable electronics that can take measurements, process data, and sustain necessary operations. However, the presence of high radiation and the cold temperature of space poses a challenge to most designers. This thesis presents the design of a radiation-hardened, cold capable emitter coupled logic standard cell library with the intention of being used for space applications. The cells are designed and fabricated in a 90nm silicon germanium BiCMOS process. First, a review of emitter coupled logic is presented. Then, the design methodology …

A Bulk Driven Transimpedance Cmos Amplifier For Sipm Based Detection, Shahram Hatefi Hesari

Masters Theses

The contribution of this work lies in the development of a bulk driven operational
transconducctance amplifier which can be integrated with other analog circuits and
photodetectors in the same chip for compactness, miniaturization and reducing the
power. Silicon photomultipliers, also known as SiPMs, when coupled with scintillator materials are used in many imaging applications including nuclear detection. This thesis discuss the design of a bulk-driven transimpedance amplifier suitable for detectors where the front end is a SiPM. The amplifier was design and fabricated in a standard standard CMOS process and is suitable for integration with CMOS based SiPMs and commercially …

Load Modeling And Evaluation Of Leds For Hardware Test Bed Application, Jillian M. Ruff

Masters Theses

The lighting industry was revolutionized with the emergence of LED lighting. Over the last 15 years, LED lighting device sales and utilization have grown immensely. The growth and popularity of LEDs is due to improved operation of the device when compared to previous lighting technologies. Efficient performance of the device is critical due to the growth of global energy consumption.

As nonrenewable generation fuel is finite, utilities have begun the transition to renewable energy generation. Generation and distribution systems become inherently complex to comprehend and maintain with incorporation of emerging supply and load technologies. With the unprecedented growth of LED …

Evaluation Of Robust Deep Learning Pipelines Targeting Low Swap Edge Deployment, David Carter Cornett

Masters Theses

The deep learning technique of convolutional neural networks (CNNs) has greatly advanced the state-of-the-art for computer vision tasks such as image classification and object detection. These solutions rely on large systems leveraging wattage-hungry GPUs to provide the computational power to achieve such performance. However, the size, weight and power (SWaP) requirements of these conventional GPU-based deep learning systems are not suitable when a solution requires deployment to so called "Edge" environments such as autonomous vehicles, unmanned aerial vehicles (UAVs) and smart security cameras.

The objective of this work is to benchmark FPGA-based alternatives to conventional GPU systems that have the …

A Secure Architecture For Defense Against Return Address Corruption, Grayson J. Bruner

Masters Theses

The advent of the Internet of Things has brought about a staggering level of inter-connectivity between common devices used every day. Unfortunately, security is not a high priority for developers designing these IoT devices. Often times the trade-off of security comes at too high of a cost in other areas, such as performance or power consumption. This is especially prevalent in resource-constrained devices, which make up a large number of IoT devices. However, a lack of security could lead to a cascade of security breaches rippling through connected devices. One of the most common attacks used by hackers is return …

Design And Evaluation Of A Sub-1-Volt Read Flash Memory In A Standard 130 Nanometer Cmos Process, David Andrew Basford

Masters Theses

Nonvolatile memory design is a discipline that employs digital and analog circuit design techniques and requires knowledge of semiconductor physics and quantum mechanics. Methods for programming and erasing memory are discussed here, and simulation models are provided for Impact Hot Electron Injection (IHEI), Fowler-Nordheim (FN) tunneling, and direct tunneling. Extensive testing of analog memory cells was used to derive a set of equations that describe the oating-gate characteristics. Measurements of charge retention also revealed several leakage mechanisms, and methods for mitigating leakage are presented.

Fabrication of ash memory in a standard CMOS process presents significant design challenges. The absence of …

An Analog Cmos Particle Filter, Trevor Watson

Masters Theses

Particle filters are used in a variety of image processing and machine learning applications. Their main use in these applications is to gather information about a system of objects, by using partial or noisy observations collected from sensors. These observations are used to associate points of interest in the observations with objects and maintain this association through a series of observations.

In this paper I will investigate the performance of a particle filter implemented in 130nm analog CMOS hardware. The design goal of the particle filter is low-microwatt power consumption. Using analog hardware, rather than digital ASICs or CPUs I …

A Sub-Threshold Low-Power Integrated Bandpass Filter For Highly-Integrated Spectrum Analyzers, Benjamin David Roehrs

Masters Theses

Low-power analog filter banks provide frequency analysis with minimal space requirements, making them viable solutions for integrated remote audio- and vibration-sensing applications. In order to achieve a balance between the length of deployable service and system performance, a critical requirement of such remote sensor networks is low-power consumption, due to the constraints imposed by on-board battery cells.

In this work, the design and implementation of a sub-threshold complementary metal-oxide semiconductor (CMOS) integrated low-power tunable analog filter channel for Oak Ridge National Laboratory is presented. Project specifications required a tunable, high-order, monolithic bandpass filter channel with small chip area and low …

Dividing And Conquering Meshes Within The Nist Fire Dynamics Simulator (Fds) On Multicore Computing Systems, Donald Charles Collins

Masters Theses

The National Institute for Standards and Technology (NIST) Fire Dynamics Simulator (FDS) provides a computational fluid dynamics model of a fire, which can be visualized by using NIST Smokeview (SMV). Users must create a configuration file (*.fds) that describes the environment and other characteristics of the fire scene so that the FDS software can produce the output file (*.smv) needed for visualization.The processing can be computationally intensive, often taking between several minutes and several hours to complete. In many cases, a user will create a file that is not optimized for a multicore computing system. By dividing meshes within the …

Danna A Neuromorphic Computing Vlsi Chip, Christopher Paul Daffron

Masters Theses

Dynamic Adaptive Neural Network Arrays (DANNAs) are neuromorphic systems that exhibit spiking behaviors and can be designed using evolutionary optimization. Array elements are rapidly reconfigurable and can function as either neurons or synapses with programmable interconnections and parameters. Currently, DANNAs are implemented using a Field Programmable Gate Array (FPGA) and are constrained by this technology. To alleviate these constraints and introduce new and improved features, a semi-custom Very Large Scale Integration (VLSI) implementation has been created. This implementation improves upon the FPGA implementation in three key areas. The density of the array is improved, with 5,625 elements on a single …

Ultra-Low-Power Configurable Analog Signal Processor For Wireless Sensors, James Kelly Griffin

Masters Theses

The demand for on-chip low-power Complementary Metal Oxide Semiconductor (CMOS) analog signal processing has significantly increased in recent years. Digital signal processors continue to shrink in size as transistors half in size every two years. However, digital signal processors (DSP's) notoriously use more power than analog signal processors (APS's). This thesis presents a configurable analog signal processor (CASP) used for wireless sensors. This CASP contains a multitude of processing blocks include the following: low pass filter (LPF), high pass filter (HPF) integrator, differentiator, operational transconductance amplifier (OTA), rectifier with absolute value functionality, and multiplier. Each block uses current-mode processing and …

A Low-Power Approach For Front End Biological Signal Conditioning, Logan Smith Taylor

Masters Theses

In a lab-on-a-chip (LOC) application, the measurement of small analog signals such as local temperature variation often involves detection of very low-level signals in a noisy micro-scale environment. This is true for other biomedical monitoring systems as well. These systems observe various physiological parameters or electrochemical reactions that need to be tracked electrically. For temperature measurement pyroelectric transducers represent an efficient solution in terms of speed, sensitivity, and scale of integration, especially when prompt and accurate temperature monitoring is desired.

The ability to perform laboratory operations on a small scale using miniaturized LOC devices is a promising biosensing technique. The …

Digital-To-Analog Converter Interface For Computer Assisted Biologically Inspired Systems, Nicholas Conley Poore

Masters Theses

In today's integrated circuit technology, system interfaces play an important role of enabling fast, reliable data communications. A key feature of this work is the exploration and development of ultra-low power data converters. Data converters are present in some form in almost all mixed-signal systems; in particular, digital-to-analog converters present the opportunity for digitally controlled analog signal sources. Such signal sources are used in a variety of applications such as neuromorphic systems and analog signal processing. Multi-dimensional systems, such as biologically inspired neuromorphic systems, require vectors of analog signals. To use a microprocessor to control these analog systems, we must …

An On-Chip Transformer-Based Digital Isolator System, Cory Lynn Fandrich

Masters Theses

An on-chip transformer-based digital isolator has been designed, fabricated, and tested. This isolation technique is designed to function between a low voltage microcontroller and a potentially high-voltage power control system. The isolator’s isolation capability is determined by two factors, the RMS blocking voltage strength and common-mode transient immunity. The integrated circuit solution is designed in a high-temperature capable SOI process.

The on-chip transformer size is minimized by utilizing high frequency voltage pulses. A small transformer and overall small chip footprint of the design are favorable for integration into a larger system. The isolator is a two chip solution, an isolated …

A Secure Reconfigurable System-On-Programmable-Chip Computer System, William Herbert Collins

Masters Theses

A System-on-Programmable-Chip (SoPC) architecture is designed to meet two goals: to provide a role-based secure computing environment and to allow for user reconfiguration. To accomplish this, a secure root of trust is derived from a fixed architectural subsystem, known as the Security Controller. It additionally provides a dynamically configurable single point of access between applications developed by users and the objects those applications use. The platform provides a model for secrecy such that physical recovery of any one component in isolation does not compromise the system. Dual-factor authentication is used to verify users. A model is also provided for tamper …

Analog Testing, Characterization, And Low-Order Model Extraction Using Labview Automation, Jeremy Brantley

Masters Theses

Testing circuits is a hands-on, time intensive process; it is also one of the most important steps in a design cycle. The most well designed circuit is only an academic exercise if it does not work in real life. The time and cost associated with bench level testing pales in comparison to testing for extreme environments. Testing in extreme heat, cold or radiation introduces a large set of challenges that are rarely encountered in standard bench level testing. The two most pronounced problems are the inaccessibility of the devices under test and time constraints, both short and protracted. Due to …

Power Aware Computing On Gpus, Kiran Kumar Kasichayanula

Masters Theses

Energy and power density concerns in modern processors have led to significant computer architecture research efforts in power-aware and temperature-aware computing. With power dissipation becoming an increasingly vexing problem, power analysis of Graphical Processing Unit (GPU) and its components has become crucial for hardware and software system design. Here, we describe our technique for a coordinated measurement approach that combines real total power measurement and per-component power estimation. To identify power consumption accurately, we introduce the Activity-based Model for GPUs (AMG), from which we identify activity factors and power for microarchitectures on GPUs that will help in analyzing power tradeoffs …

Pvt Compensation For Single-Slope Measurement Systems, Kevin Vun Kiat Tham

Masters Theses

A pulse-width locked loop (PWLL) circuit is reported that compensates for process, voltage, and temperature (PVT) variations of a linear ramp generator within a 12-bit multi-channel Wilkinson (single-slope integrating) Analog-to-Digital (ADC). This PWLL was designed and fabricated in a 0.5-um Silicon Germanium (SiGe) BiCMOS process. The PWLL architecture that is comprised of a phase detector, a charge-pump, and a pulse width modulator (PWM), is discussed along with the design details of the primary blocks. Simulation and silicon measurement data are shown that demonstrate a large improvement in the accuracy of the PVT-compensated ADC over the uncompensated ADC.

Low Power Design Of A 916 Mhz Gilbert Cell Mixer And A Class-A Power Amplifier For Bioluminescent Bioreporter Integrated Circuit Transmitter, Supriya Kilambi

Masters Theses

This thesis presents the low power design of a 916MHz Gilbert cell mixer and a Class-A power amplifier for the Bioluminescent Bioreporter Integrated Circuit (BBIC) transmitter.

There has been increased use in the man-made sensors which can operate in environments unsuitable for humans and at locations remote from the observer. One such sensor is the bioluminescent bioreporter integrated circuit (BBIC). Bioluminescent bioreporters are the bacteria that are genetically engineered in order to achieve bioluminescence when in contact with the target substance. The BBIC has bioreporters placed on a single CMOS integrated circuit (IC) that detects the bioluminescence, performs the signal …

Gpu-Based Implementation Of The Variational Path Integral Method, Shanthan Mudhasani

Masters Theses

Any system in the world constitutes particles like electrons. To analyze the behaviors of these systems the behavior of these particles must be predicted. The ground state energy of a molecule is the most important information about a molecule and can calculate by solving the Schrodinger equation. But as the number of atoms increase, the number of variable (coordinates of the atom) that the equation represent increases by three times. Due to the large state space and the nonlinear nature of the Schrodinger equation, it is very difficult to solver this equation. Quantum Monte Carlo (QMC) is a very efficient …

Design And Implementation Of A Signal Conditioning Operational Amplifier For A Reflective Object Sensor, Ankit Master

Masters Theses

Industrial systems often require the acquisition of real-world analog signals for several applications. Various physical phenomena such as displacement, pressure, temperature, light intensity, etc. are measured by sensors, which is a type of transducer, and then converted into a corresponding electrical signal. The electrical signal obtained from the sensor, usually a few tens mV in magnitude, is subsequently conditioned by means of amplification, filtering, range matching, isolation etc., so that the signal can be rendered for further processing and data extraction.

This thesis presents the design and implementation of a general purpose op amp used to condition a reflective object …

An Fpga Based Implementation Of The Exact Stochastic Simulation Algorithm, Phani Bharadwaj Vanguri

Masters Theses

Mathematical and statistical modeling of biological systems is a desired goal for many years. Many biochemical models are often evaluated using a deterministic approach, which uses differential equations to describe the chemical interactions. However, such an approach is inaccurate for small species populations as it neglects the discrete representation of population values, presents the possibility of negative populations, and does not represent the stochastic nature of biochemical systems. The Stochastic Simulation Algorithm (SSA) developed by Gillespie is able to properly account for these inherent noise fluctuations. Due to the stochastic nature of the Monte Carlo simulations, large numbers of simulations …

A Fully Integrated High-Temperature, High-Voltage, Bcd-On-Soi Voltage Regulator, Benjamin Matthew Mccue

Masters Theses

Developments in automotive (particularly hybrid electric vehicles), aerospace, and energy production industries over the recent years have led to expanding research interest in integrated circuit (IC) design toward high-temperature applications. A high-voltage, high-temperature SOI process allows for circuit design to expand into these extreme environment applications. Nearly all electronic devices require a reliable supply voltage capable of operating under various input voltages and load currents. These input voltages and load currents can be either DC or time-varying signals. In this work, a stable supply voltage for embedded circuit functions is generated on chip via a voltage regulator circuit producing a …