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Full-Text Articles in Engineering

A Reconfigurable Digital-To-Analog Converter With Supply Invariant Linearity, Nicholas J. Chiolino Dec 2013

A Reconfigurable Digital-To-Analog Converter With Supply Invariant Linearity, Nicholas J. Chiolino

Graduate Theses and Dissertations

A novel reconfigurable digital-to-analog converter (DAC) with supply independent linearity is presented. The process agnostic converter achieves wide supply range operation and re-configurability by being charge based. This converter consists of a 7-bit parallel digital input control core and an analog "summing" core utilizing charging capacitors with an operational transconductance amplifier in a voltage-follower configuration. This topology is highly configurable to allow for optimization across process voltages, step sizes and low power operation. The specification of the DAC is (1) supply independence (2) low power operation (3) operation up to 200 kHz and (4) conversion control through a DAC enable …


Analysis Of Parameter Tuning On Energy Efficiency In Asynchronous Circuits, Justin Thomas Roark Aug 2013

Analysis Of Parameter Tuning On Energy Efficiency In Asynchronous Circuits, Justin Thomas Roark

Graduate Theses and Dissertations

Power and energy consumption are the primary concern of the digital integrated circuit (IC) industry. Asynchronous logic, in the past several years, has increased in popularity due to its low power nature. This thesis analyzes a collection of array multipliers with different parameters to compare two asynchronous design paradigms, NULL Convention Logic (NCL) and Multi-Threshold NULL Convention Logic (MTNCL). Several commercially available pieces of software and custom scripts are used to analyze the asynchronous circuits and their components to provide the energy consumption estimation on various parts of each circuit. The analysis of the software results revealed that MTNCL circuits …


Cad Tool Design For Ncl And Mtncl Asynchronous Circuits, Vijay Mani Pillai Aug 2013

Cad Tool Design For Ncl And Mtncl Asynchronous Circuits, Vijay Mani Pillai

Graduate Theses and Dissertations

This thesis presents an implementation of a method developed to readily convert Boolean designs into an ultra-low power asynchronous design methodology called MTNCL, which combines multi-threshold CMOS (MTCMOS) with NULL Convention Logic (NCL) systems. MTNCL provides the leakage power advantages of an all high-Vt implementation with a reasonable speed penalty compared to the all low-Vt implementation, and has negligible area overhead. The proposed tool utilizes industry-standard CAD tools. This research also presents an Automated Gate-Level Pipelining with Bit-Wise Completion (AGLPBW) method to maximize throughput of delay-insensitive full-word pipelined NCL circuits. These methods have been integrated into the Mentor Graphics and …


Automated Behavioral Modeling Of Switching Voltage Regulators, Michael Leonard May 2013

Automated Behavioral Modeling Of Switching Voltage Regulators, Michael Leonard

Electrical Engineering Undergraduate Honors Theses

This work describes the development of a software tool that implements a novel method for automatically generating simulation ready behavioral models for switching circuits with an emphasis on power regulators. The work begins by examining the theory of operation of both linear and switching regulators. Then, the capability of two behavioral modeling languages (Verilog-A and PSPICE ABM) are examined in detail. Next, the languages previously discussed are used to develop and test a model of a commercial regulator (Texas Instruments TPS40305). Finally, the prospect of automating the process is discussed


Design, Layout, And Testing Of A Silicon Carbide-Based Under Voltage Lock-Out Circuit, Michael Dalan Glover May 2013

Design, Layout, And Testing Of A Silicon Carbide-Based Under Voltage Lock-Out Circuit, Michael Dalan Glover

Graduate Theses and Dissertations

Silicon carbide-based power devices play an increasingly important role in modern power conversion systems. Finding a means to reduce the size and complexity of these systems by even incremental amounts can have a significant impact on cost and reliability. One approach to achieving this goal is the die-level integration of gate driver circuitry with the SiC power devices. Aside from cost reductions, there are significant advantages to the integration of the gate driver circuits with the power devices. By integrating the gate driver circuitry with the power devices, the parasitic inductances traditionally seen between the gate driver and the switching …


Cad Tools For Synthesis Of Sleep Convention Logic, Parviz Palangpour May 2013

Cad Tools For Synthesis Of Sleep Convention Logic, Parviz Palangpour

Graduate Theses and Dissertations

This dissertation proposes an automated flow for the Sleep Convention Logic (SCL) asynchronous design style. The proposed flow synthesizes synchronous RTL into an SCL netlist. The flow utilizes commercial design tools, while supplementing missing functionality using custom tools. A method for determining the performance bottleneck in an SCL design is proposed. A constraint-driven method to increase the performance of linear SCL pipelines is proposed. Several enhancements to SCL are proposed, including techniques to reduce the number of registers and total sleep capacitance in an SCL design.