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VLSI and Circuits, Embedded and Hardware Systems

Boise State University

DRAM

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Full-Text Articles in Engineering

Low-Power, High-Bandwidth And Ultra-Small Memory Module Design, Qawi Ibnzayd Harvard May 2011

Low-Power, High-Bandwidth And Ultra-Small Memory Module Design, Qawi Ibnzayd Harvard

Boise State University Theses and Dissertations

The main memory subsystem has become inefficient. The performance gained has come at the expenses of power consumption, capacity, and cost. This dissertation proposes novel module, DRAM, and interconnect architectures in an attempt to alleviate these trends. The proposed architectures utilize low-cost interconnects and packaging innovations to substantially reduce the power, and increase the capacity and bandwidth of the main memory system.

This dissertation develops the theory behind a low-cost packaging technology to create an 8-die and 32-die memory module. The 32-die memory module measures less than 2 cm3.

This dissertation also proposes a 4 Gb DRAM architecture …


Wide I/O Dram Architecture Utilizing Proximity Communication, Qawi Ibnzayd Harvard Dec 2009

Wide I/O Dram Architecture Utilizing Proximity Communication, Qawi Ibnzayd Harvard

Boise State University Theses and Dissertations

The bandwidth and power consumption of dynamic random access memory, used as the main memory of a computer system, impacts the computer’s execution rate even with the existence of a memory hierarchy. DRAM manufacturers focus on density increases due to the innate price per bit decline of main memory while processor manufacturers continually focus on boosting performance by increasing the number of instructions completed per second. This leads to a performance gap between the microprocessor and DRAM.

Proximity communication promises to increase the I/O density of DRAM products while reducing the power consumption of the main memory system. This thesis …