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Fabrication Of Vertical Silicon Nanowires Through Metal Assisted Deposition, Matthew Garett Young

Graduate Theses and Dissertations

Controlled and ordered growth of Si nanowires through a low temperature fabrication method compatible with CMOS processing lines is a highly desirable replacement to future electronic fabrication technologies as well as a candidate for a low cost route to inexpensive photovoltaics. This stems from the fact that traditional CMOS based electronics are hitting physical barriers that are slowing the Moore's Law trend as well as the demand for an inexpensive solar cell technology that can obtain grid parity. A fractional factorial growth study is presented that compares the growth of Au and Al catalyzed Si nanowires at temperatures ranging from …