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Engineering Commons

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Electromagnetics and Photonics

Missouri University of Science and Technology

Electrical and Computer Engineering Faculty Research & Creative Works

2014

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Full-Text Articles in Engineering

First Demonstration Of Ultra-Thin Sige-Channel Junctionless Accumulation-Mode (Jam) Bulk Finfets On Si Substrate With Pn Junction-Isolation Scheme, Donghyun Kim, Tae Kyun Kim, Young Gwang Yoon, Byeong Woon Hwang, Yang-Kyu Choi, Byung Jin Cho, Seok-Hee Lee Sep 2014

First Demonstration Of Ultra-Thin Sige-Channel Junctionless Accumulation-Mode (Jam) Bulk Finfets On Si Substrate With Pn Junction-Isolation Scheme, Donghyun Kim, Tae Kyun Kim, Young Gwang Yoon, Byeong Woon Hwang, Yang-Kyu Choi, Byung Jin Cho, Seok-Hee Lee

Electrical and Computer Engineering Faculty Research & Creative Works

A SiGe-channel junctionless-accumulation-mode (JAM) PMOS bulk FinFETs were successfully demonstrated on Si substrate with PN junction-isolation scheme for the first time. The JAM bulk FinFETs with fin width of 18 nm exhibits excellent subthreshold characteristics such as subthreshold swing of 64 mV/decade, drain-induced barrier lowering (DIBL) of 40 mV/V and high Ion/Ioff current ratio ( > 1 x 105). The change of substrate bias from 0 to 5 V leads to the threshold voltage shift of 53 mV by modulating the effective channel thickness. When compared to the Si-channel bulk FinFETs with fin width of 18 …