Engineering Commons^™

Statistical Modeling And Simulation Of Variability And Reliability Of Cmos Technology, Khaled Hassan Md

Open Access Dissertations

The introduction of High-κ Metal Gate transistors led to higher integration density, low leakage current, and faster switching speed. However, this transition in technology roadmap brought about new failure mechanisms such as Positive Bias Temperature Instability and Stress Induced Leakage Current. In addition, the relentless downscaling of devices to keep up with Moore's law has significantly increased the time-zero variability caused by Random Dopant Fluctuation, Mean Gate Length Deviation, and Line Edge Roughness. Because of their possible correlation with time dependent aging effects, the quantification of reliability has become more complex than ever. To that effect, we propose a framework …

A Secure, Reliable And Performance-Enhancing Storage Architecture Integrating Local And Cloud-Based Storage, Christopher Glenn Hansen

Theses and Dissertations

The constant evolution of new varieties of computing systems - cloud computing, mobile devices, and Internet of Things, to name a few - have necessitated a growing need for highly reliable, available, secure, and high-performing storage systems. While CPU performance has typically scaled with Moore's Law, data storage is much less consistent in how quickly performance increases over time. One method of improving storage performance is through the use of special storage architectures. Such architectures often include redundant arrays of independent disks (RAID). RAID provides a meaningful way to increase storage performance on a variety of levels, some higher-performing than …

Model Building And Security Analysis Of Puf-Based Authentication, Wenjie Che

Electrical and Computer Engineering ETDs

In the context of hardware systems, authentication refers to the process of confirming the identity and authenticity of chip, board and system components such as RFID tags, smart cards and remote sensors. The ability of physical unclonable functions (PUF) to provide bitstrings unique to each component can be leveraged as an authentication mechanism to detect tamper, impersonation and substitution of such components. However, authentication requires a strong PUF, i.e., one capable of producing a large, unique set of bits per device, and, unlike secret key generation for encryption, has additional challenges that relate to machine learning attacks, protocol attacks and …

Intrinsic Functions For Securing Cmos Computation: Variability, Modeling And Noise Sensitivity, Xiaolin Xu

Doctoral Dissertations

A basic premise behind modern secure computation is the demand for lightweight cryptographic primitives, like identifier or key generator. From a circuit perspective, the development of cryptographic modules has also been driven by the aggressive scalability of complementary metal-oxide-semiconductor (CMOS) technology. While advancing into nano-meter regime, one significant characteristic of today's CMOS design is the random nature of process variability, which limits the nominal circuit design. With the continuous scaling of CMOS technology, instead of mitigating the physical variability, leveraging such properties becomes a promising way. One of the famous products adhering to this double-edged sword philosophy is the Physically …

Dynamic Processor Reconfiguration For Power, Performance And Reliability Management, Sudarshan Srinivasan

Doctoral Dissertations

Technology advancements allowed more transistors to be packed in a smaller area, while the improved performance helped in achieving higher clock frequencies. This, unfortunately led to a power density problem, forcing processor industry to lower the clock frequency and integrate multiple cores on the same die. Depending on core characteristics, the multiple cores in the die could be symmetric or asymmetric. Asymmetric multi-core processors (AMPs) have been proposed as an alternative to symmetric multi-cores to improve power efficiency. AMPs comprise of cores that implement the same ISA, but differ in performance and power characteristics due to varying sizes of micro-architectural …

Benefits Of Considering More Than Temperature Acceleration For Gan Hemt Life Testing, Ronald A. Coutu Jr., Robert A. Lake, Bradley D. Christiansen, Eric R. Heller, Christopher A. Bozada, Brian S. Poling, Glen D. Via, James P. Theimer, Stephen E. Tetlak, Ramakrishna Vetury, Jeffrey B. Shealy

Electrical and Computer Engineering Faculty Research and Publications

The purpose of this work was to investigate the validity of Arrhenius accelerated-life testing when applied to gallium nitride (GaN) high electron mobility transistors (HEMT) lifetime assessments, where the standard assumption is that only critical stressor is temperature, which is derived from operating power, device channel-case, thermal resistance, and baseplate temperature. We found that power or temperature alone could not explain difference in observed degradation, and that accelerated life tests employed by industry can benefit by considering the impact of accelerating factors besides temperature. Specifically, we found that the voltage used to reach a desired power dissipation is important, and …

Benefits Of Considering More Than Temperature Acceleration For Gan Hemt Life Testing, Ronald A. Coutu Jr., Robert A. Lake, Bradley D. Christiansen, Eric R. Heller, Christopher A. Bozada, Brian S. Poling, Glen D. Via, James P. Theimer, Stephen E. Tetlak, Ramakrishna Vetury, Jeffrey B. Shealy

Faculty Publications

The purpose of this work was to investigate the validity of Arrhenius accelerated-life testing when applied to gallium nitride (GaN) high electron mobility transistors (HEMT) lifetime assessments, where the standard assumption is that only critical stressor is temperature, which is derived from operating power, device channel-case, thermal resistance, and baseplate temperature. We found that power or temperature alone could not explain difference in observed degradation, and that accelerated life tests employed by industry can benefit by considering the impact of accelerating factors besides temperature. Specifically, we found that the voltage used to reach a desired power dissipation is important, and …

Duplicate With Choose: Using Statistics For Fault Mitigation, Jon-Paul Anderson

Theses and Dissertations

This dissertation presents a novel technique called duplicate with choose (DWCh) which is a modification of the fault detection technique duplicate with compare (DWC). DWCh adds a smart decider block to DWC that monitors the duplicated circuits and decides which circuit is fault free when a fault occurs. If chosen correctly, DWCh is able to mask faults at a lower cost than conventional techniques like TMR.This dissertation derives reliability expressions for DWCh showing that under ideal conditions its reliability exceeds the most commonly used fault masking technique for spacecraft, triple modular redundancy. For non-ideal conditions, DWCh provides a lower cost …

Measuring Soft Error Sensitivity Of Fpga Soft Processor Designs Using Fault Injection, Nathan Arthur Harward

Theses and Dissertations

Increasingly, soft processors are being considered for use within FPGA-based reliable computing systems. In an environment in which radiation is a concern, such as space, the logic and routing (configuration memory) of soft processors are sensitive to radiation effects, including single event upsets (SEUs). Thus, effective tools are needed to evaluate and estimate how sensitive the configuration memories of soft processors are in high-radiation environments. A high-speed FPGA fault injection system and methodology were created using the Xilinx Radiation Test Consortium's (XRTC's) Virtex-5 radiation test hardware to conduct exhaustive tests of the SEU sensitivity of a design within an FPGA's …

Exploration Of Erasure-Coded Storage Systems For High Performance, Reliability, And Inter-Operability, Pradeep Subedi

Theses and Dissertations

With the unprecedented growth of data and the use of low commodity drives in local disk-based storage systems and remote cloud-based servers has increased the risk of data loss and an overall increase in the user perceived system latency. To guarantee high reliability, replication has been the most popular choice for decades, because of simplicity in data management. With the high volume of data being generated every day, the storage cost of replication is very high and is no longer a viable approach.

Erasure coding is another approach of adding redundancy in storage systems, which provides high reliability at a …