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Hardware Support For A Configurable Architecture For Real-Time Embedded Systems On A Programmable Chip, Spencer W. Isaacson
Hardware Support For A Configurable Architecture For Real-Time Embedded Systems On A Programmable Chip, Spencer W. Isaacson
Theses and Dissertations
Current FPGA technology has advanced to the point that useful embedded SoPCs can now be designed. The Real Time Processor (RTP) project at Brigham Young University leverages the advances in FPGA technology with a system architecture that is customizable to specific applications. A simple real-time processor has been designed to provide support for a hardware-assisted real-time operating system providing fast context switches. As part of the hardware RTOS, the following have been implemented in hardware: scheduler, register banks, mutex, semaphore, queue, interrupts, event, and others. A novel circuit called the Task-Resource Matrix has been created to allow fast inter/intra processor …
Compilation And Generation Of Multi-Processor On A Chip Real-Time Embedded Systems, Randall S. Klingler
Compilation And Generation Of Multi-Processor On A Chip Real-Time Embedded Systems, Randall S. Klingler
Theses and Dissertations
Current FPGA technology has advanced to the point that useful embedded System-on-Programmable-Chips (SoPC)s can now be designed. The Real Time Processor (RTP) project leverages the advances in FPGA technology with a system architecture that is customizable to specific real-time applications. The design and implementation of the framework for architecting such a system from ANSI-C code is presented. The Small Device C Compiler (SDCC) was retargeted to the RTP architecture and extended to produce a generator directive file. The RTPGen hardware generator was created to consume the directive file and produce a highly customized top-level structural VHDL file that can be …