Open Access. Powered by Scholars. Published by Universities.®
Articles 1 - 1 of 1
Full-Text Articles in Engineering
A Programmable Cmos Decimator For Sigma-Delta Analog-To-Digital Converter And Charge Pump Circuits, Raghavendra Reddy Anantha
A Programmable Cmos Decimator For Sigma-Delta Analog-To-Digital Converter And Charge Pump Circuits, Raghavendra Reddy Anantha
LSU Master's Theses
PROGRAMMABLE DECIMATOR FOR SIGMA-DELTA ANALOG-TO-DIGITAL CONVERTER: In this work a programmable decimator design has been presented in 1.5 μm n-well CMOS process for integration with an existing modulator to form a sigma-delta analog-to-digital converter (ADC). The decimator is implemented using a second order Cascaded Integrator Comb (CIC) filter and can be programmed to work with two different oversampling ratios of 64 and 16. The input to the decimator is provided from a first order modulator. With oversampling ratios of 64 and 16, an output resolution of 10-bit and 7-bit, respectively are achieved for the ADC. The ADC can be operated …